From: dinguyen@opensource.altera.com (dinguyen at opensource.altera.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2] ARM: socfpga: dts: Add a clock node for sdmmc CIU
Date: Tue, 14 Apr 2015 11:05:19 -0500 [thread overview]
Message-ID: <1429027519-22209-1-git-send-email-dinguyen@opensource.altera.com> (raw)
From: Dinh Nguyen <dinguyen@opensource.altera.com>
The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: renamed ciu_clk to sdmmc_clk_divided
---
arch/arm/boot/dts/socfpga.dtsi | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index d9176e6..be4beda 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -451,6 +451,14 @@
clk-phase = <0 135>;
};
+ sdmmc_clk_divided: sdmmc_clk_divided {
+ #clock-cells = <0>;
+ compatible = "altr,socfpga-gate-clk";
+ clocks = <&sdmmc_clk>;
+ clk-gate = <0xa0 8>;
+ fixed-divider = <4>;
+ };
+
nand_x_clk: nand_x_clk {
#clock-cells = <0>;
compatible = "altr,socfpga-gate-clk";
@@ -635,7 +643,7 @@
fifo-depth = <0x400>;
#address-cells = <1>;
#size-cells = <0>;
- clocks = <&l4_mp_clk>, <&sdmmc_clk>;
+ clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
clock-names = "biu", "ciu";
};
--
2.2.1
next reply other threads:[~2015-04-14 16:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-14 16:05 dinguyen at opensource.altera.com [this message]
2015-05-13 7:54 ` [PATCHv2] ARM: socfpga: dts: Add a clock node for sdmmc CIU Stephen Boyd
2015-05-13 15:00 ` Dinh Nguyen
2015-05-13 18:09 ` Stephen Boyd
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