From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 09/11] coresight-etm4x: Controls pertaining to the selection of resources
Date: Wed, 29 Apr 2015 11:16:33 -0600 [thread overview]
Message-ID: <1430327795-10710-10-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1430327795-10710-1-git-send-email-mathieu.poirier@linaro.org>
From: Pratik Patel <pratikp@codeaurora.org>
Adding sysfs entries to control the selection of the resources the
trace unit will use as triggers to perform a trace run.
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 12 ++++
drivers/hwtracing/coresight/coresight-etm4x.c | 75 ++++++++++++++++++++++
2 files changed, 87 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
index b4581c9426d3..b5c0456290ab 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
@@ -242,3 +242,15 @@ Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls the operation of the selected counter.
+
+What: /sys/bus/coresight/devices/<memory_map>.etm/res_idx
+Date: April 2015
+KernelVersion: 4.01
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (RW) Select which resource selection unit to work with.
+
+What: /sys/bus/coresight/devices/<memory_map>.etm/res_ctrl
+Date: April 2015
+KernelVersion: 4.01
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (RW) Controls the selection of the resources in the trace unit.
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index cd6a1d51ad66..a9fda8ad8c2e 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -1707,6 +1707,79 @@ static ssize_t cntr_ctrl_store(struct device *dev,
}
static DEVICE_ATTR_RW(cntr_ctrl);
+static ssize_t res_idx_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ unsigned long val;
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ val = drvdata->res_idx;
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
+}
+
+static ssize_t res_idx_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ unsigned long val;
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ if (kstrtoul(buf, 16, &val))
+ return -EINVAL;
+ /* Resource selector pair 0 is always implemented and reserved */
+ if ((val == 0) || (val >= drvdata->nr_resource))
+ return -EINVAL;
+
+ /*
+ * Use spinlock to ensure index doesn't change while it gets
+ * dereferenced multiple times within a spinlock block elsewhere.
+ */
+ spin_lock(&drvdata->spinlock);
+ drvdata->res_idx = val;
+ spin_unlock(&drvdata->spinlock);
+ return size;
+}
+static DEVICE_ATTR_RW(res_idx);
+
+static ssize_t res_ctrl_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ u8 idx;
+ unsigned long val;
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ spin_lock(&drvdata->spinlock);
+ idx = drvdata->res_idx;
+ val = drvdata->res_ctrl[idx];
+ spin_unlock(&drvdata->spinlock);
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
+}
+
+static ssize_t res_ctrl_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ u8 idx;
+ unsigned long val;
+ struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ if (kstrtoul(buf, 16, &val))
+ return -EINVAL;
+
+ spin_lock(&drvdata->spinlock);
+ idx = drvdata->res_idx;
+ /* For odd idx pair inversal bit is RES0 */
+ if (idx % 2 != 0)
+ /* PAIRINV, bit[21] */
+ val &= ~BIT(21);
+ drvdata->res_ctrl[idx] = val;
+ spin_unlock(&drvdata->spinlock);
+ return size;
+}
+static DEVICE_ATTR_RW(res_ctrl);
+
static ssize_t status_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1887,6 +1960,8 @@ static struct attribute *coresight_etmv4_attrs[] = {
&dev_attr_cntrldvr.attr,
&dev_attr_cntr_val.attr,
&dev_attr_cntr_ctrl.attr,
+ &dev_attr_res_idx.attr,
+ &dev_attr_res_ctrl.attr,
&dev_attr_status.attr,
&dev_attr_mgmt.attr,
&dev_attr_trcidr.attr,
--
1.9.1
next prev parent reply other threads:[~2015-04-29 17:16 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-29 17:16 [PATCH v2 00/11] Support for coresight ETMv4 tracer Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 01/11] coresight-etm4x: Adding CoreSight ETM4x driver Mathieu Poirier
2015-04-30 21:29 ` Paul Bolle
2015-05-01 14:39 ` Mathieu Poirier
2015-05-01 18:28 ` Paul Bolle
2015-04-29 17:16 ` [PATCH v2 02/11] coresight-etm4x: Controls pertaining to tracer configuration Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 03/11] coresight-etm4x: Controls pertaining to the reset, mode, pe and events Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 04/11] coresight-etm4x: Controls pertaining to various configuration options Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 05/11] coresight-etm4x: Controls pertaining to the ViewInst register Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 06/11] coresight-etm4x: Controls pertaining to the address comparator functions Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 07/11] coresight-etm4x: Controls pertaining to the sequencer functions Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 08/11] coresight-etm4x: Controls pertaining to the counter functions Mathieu Poirier
2015-04-29 17:16 ` Mathieu Poirier [this message]
2015-04-29 17:16 ` [PATCH v2 10/11] coresight-etm4x: Controls pertaining to the context ID functions Mathieu Poirier
2015-04-29 17:16 ` [PATCH v2 11/11] coresight-etm4x: Controls pertaining to the VM " Mathieu Poirier
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