[PATCH 0/7] Add SMP bringup support for mt65xx socs

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Yingjoe Chen]

This series add SMP brinup support for mediatek SoCs. This is based
on v4.1-rc1.

There are 2 similar but different SMP bringup up methods on Mediatek
mt65xx and mt81xx. On MT8135 & MT8127, system boots with a trustzone
firmware. Others, like MT6589, doesn't have trustzone, and run kernel
directly in secure world.

Patch 1~3 fix issues in mtk_timer(GPT) and enable arch timer support.
Patch 4,5 add support for cpu enable-method "mediatek,mt65xx-smp" and
"mediatek,mt81xx-tz-smp", which support Mediatek SMP bringup for non-TZ
and TZ platform.
Patch 6,7 finally enable SMP bringup for mt8135 and mt8127.

Matthias Brugger (1):
  arm: mediatek: enable gpt6 on boot up to make arch timer working

Yingjoe Chen (6):
  clocksource: mediatek: Don't run event_handler if it is NULL
  clocksource: mediatek: Use GPT as sched clock source
  devicetree: bindings: add new SMP enable method Mediatek SoC
  ARM: mediatek: add smp bringup code
  ARM: dts: mt8135: enable basic SMP bringup for mt8135
  ARM: dts: mt8127: enable basic SMP bringup for mt8127

 Documentation/devicetree/bindings/arm/cpus.txt |   2 +
 arch/arm/boot/dts/mt8127.dtsi                  |  16 +++
 arch/arm/boot/dts/mt8135.dtsi                  |  16 +++
 arch/arm/mach-mediatek/Makefile                |   3 +
 arch/arm/mach-mediatek/mediatek.c              |  29 +++++
 arch/arm/mach-mediatek/platsmp.c               | 145 +++++++++++++++++++++++++
 drivers/clocksource/mtk_timer.c                |  13 ++-
 7 files changed, 223 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-mediatek/platsmp.c

[PATCH 1/7] clocksource: mediatek: Don't run event_handler if it is NULL

[Yingjoe Chen]

Spurious timer interrupt is noticed in mtk timer and cause kernel
crash. In mtk_timer_interrupt(), only run event_handler if it is
not NULL.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 drivers/clocksource/mtk_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
index 68ab423..85e0ab5 100644
--- a/drivers/clocksource/mtk_timer.c
+++ b/drivers/clocksource/mtk_timer.c
@@ -143,7 +143,8 @@ static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id)
 
 	/* Acknowledge timer0 irq */
 	writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
-	evt->dev.event_handler(&evt->dev);
+	if (evt->dev.event_handler)
+		evt->dev.event_handler(&evt->dev);
 
 	return IRQ_HANDLED;
 }
-- 
1.8.1.1.dirty

[PATCH 1/7] clocksource: mediatek: Don't run event_handler if it is NULL

[Daniel Lezcano]

On 05/01/2015 09:43 AM, Yingjoe Chen wrote:
> Spurious timer interrupt is noticed in mtk timer and cause kernel
> crash. In mtk_timer_interrupt(), only run event_handler if it is
> not NULL.
>
> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> ---
>   drivers/clocksource/mtk_timer.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
> index 68ab423..85e0ab5 100644
> --- a/drivers/clocksource/mtk_timer.c
> +++ b/drivers/clocksource/mtk_timer.c
> @@ -143,7 +143,8 @@ static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id)
>
>   	/* Acknowledge timer0 irq */
>   	writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
> -	evt->dev.event_handler(&evt->dev);
> +	if (evt->dev.event_handler)
> +		evt->dev.event_handler(&evt->dev);
>
>   	return IRQ_HANDLED;
>   }
>

This fix does not look good.

Could you try by requesting the irq *after* 
clockevents_config_and_register in the init sequence [1] ?

Thanks
   -- Daniel

[1] 
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=1096be084ac59927158ce80ff1d31c33eed0e565

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[PATCH 1/7] clocksource: mediatek: Don't run event_handler if it is NULL

[Matthias Brugger]

2015-05-04 10:14 GMT+02:00 Daniel Lezcano <daniel.lezcano@linaro.org>:
> On 05/01/2015 09:43 AM, Yingjoe Chen wrote:
>>
>> Spurious timer interrupt is noticed in mtk timer and cause kernel
>> crash. In mtk_timer_interrupt(), only run event_handler if it is
>> not NULL.
>>
>> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
>> ---
>>   drivers/clocksource/mtk_timer.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clocksource/mtk_timer.c
>> b/drivers/clocksource/mtk_timer.c
>> index 68ab423..85e0ab5 100644
>> --- a/drivers/clocksource/mtk_timer.c
>> +++ b/drivers/clocksource/mtk_timer.c
>> @@ -143,7 +143,8 @@ static irqreturn_t mtk_timer_interrupt(int irq, void
>> *dev_id)
>>
>>         /* Acknowledge timer0 irq */
>>         writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
>> -       evt->dev.event_handler(&evt->dev);
>> +       if (evt->dev.event_handler)
>> +               evt->dev.event_handler(&evt->dev);
>>
>>         return IRQ_HANDLED;
>>   }
>>
>
> This fix does not look good.
>
> Could you try by requesting the irq *after* clockevents_config_and_register
> in the init sequence [1] ?
>

>From my understanding [1] should already fix this.

[1] https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/commit/drivers/clocksource/mtk_timer.c?id=d4a19eb3b15a4ba98f627182f48d5bc0cffae670

Regards,
Matthias

-- 
motzblog.wordpress.com

[PATCH 1/7] clocksource: mediatek: Don't run event_handler if it is NULL

[Daniel Lezcano]

On 05/04/2015 10:34 AM, Matthias Brugger wrote:
> 2015-05-04 10:14 GMT+02:00 Daniel Lezcano <daniel.lezcano@linaro.org>:
>> On 05/01/2015 09:43 AM, Yingjoe Chen wrote:
>>>
>>> Spurious timer interrupt is noticed in mtk timer and cause kernel
>>> crash. In mtk_timer_interrupt(), only run event_handler if it is
>>> not NULL.
>>>
>>> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
>>> ---
>>>    drivers/clocksource/mtk_timer.c | 3 ++-
>>>    1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/clocksource/mtk_timer.c
>>> b/drivers/clocksource/mtk_timer.c
>>> index 68ab423..85e0ab5 100644
>>> --- a/drivers/clocksource/mtk_timer.c
>>> +++ b/drivers/clocksource/mtk_timer.c
>>> @@ -143,7 +143,8 @@ static irqreturn_t mtk_timer_interrupt(int irq, void
>>> *dev_id)
>>>
>>>          /* Acknowledge timer0 irq */
>>>          writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
>>> -       evt->dev.event_handler(&evt->dev);
>>> +       if (evt->dev.event_handler)
>>> +               evt->dev.event_handler(&evt->dev);
>>>
>>>          return IRQ_HANDLED;
>>>    }
>>>
>>
>> This fix does not look good.
>>
>> Could you try by requesting the irq *after* clockevents_config_and_register
>> in the init sequence [1] ?
>>
>
>  From my understanding [1] should already fix this.
>
> [1] https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/commit/drivers/clocksource/mtk_timer.c?id=d4a19eb3b15a4ba98f627182f48d5bc0cffae670

Indeed it seems to fix it. But I think request_irq should be done after 
clockevents_config_and_register in any case.

Yingjoe, are the spurious interrupts occurring with the fix Matthias 
mentions ?


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[PATCH 1/7] clocksource: mediatek: Don't run event_handler if it is NULL

[Yingjoe Chen]

On Mon, 2015-05-04 at 10:44 +0200, Daniel Lezcano wrote:
> On 05/04/2015 10:34 AM, Matthias Brugger wrote:
> > 2015-05-04 10:14 GMT+02:00 Daniel Lezcano <daniel.lezcano@linaro.org>:
> >> On 05/01/2015 09:43 AM, Yingjoe Chen wrote:
> >>>
> >>> Spurious timer interrupt is noticed in mtk timer and cause kernel
> >>> crash. In mtk_timer_interrupt(), only run event_handler if it is
> >>> not NULL.
> >>>
> >>> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> >>> ---
> >>>    drivers/clocksource/mtk_timer.c | 3 ++-
> >>>    1 file changed, 2 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/drivers/clocksource/mtk_timer.c
> >>> b/drivers/clocksource/mtk_timer.c
> >>> index 68ab423..85e0ab5 100644
> >>> --- a/drivers/clocksource/mtk_timer.c
> >>> +++ b/drivers/clocksource/mtk_timer.c
> >>> @@ -143,7 +143,8 @@ static irqreturn_t mtk_timer_interrupt(int irq, void
> >>> *dev_id)
> >>>
> >>>          /* Acknowledge timer0 irq */
> >>>          writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
> >>> -       evt->dev.event_handler(&evt->dev);
> >>> +       if (evt->dev.event_handler)
> >>> +               evt->dev.event_handler(&evt->dev);
> >>>
> >>>          return IRQ_HANDLED;
> >>>    }
> >>>
> >>
> >> This fix does not look good.
> >>
> >> Could you try by requesting the irq *after* clockevents_config_and_register
> >> in the init sequence [1] ?
> >>
> >
> >  From my understanding [1] should already fix this.
> >
> > [1] https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/commit/drivers/clocksource/mtk_timer.c?id=d4a19eb3b15a4ba98f627182f48d5bc0cffae670
> 
> Indeed it seems to fix it. But I think request_irq should be done after 
> clockevents_config_and_register in any case.
> 
> Yingjoe, are the spurious interrupts occurring with the fix Matthias 
> mentions ?
> 

Hi Daniel, Matthias,

Thanks for your review.

Unfortunately, I still saw the spurious interrupts with both fixes.

After some experiments, it seems the HW will latch irq status even when 
IRQ is disabled. I can fix this issue by either ack irq before enable
irq(like patch below), or not enable clock event before enable irq.

I'll come up a fix base on this next time.

diff --git a/drivers/clocksource/mtk_timer.c
b/drivers/clocksource/mtk_timer.c
index 9a90c7b..c5f804a 100644
--- a/drivers/clocksource/mtk_timer.c
+++ b/drivers/clocksource/mtk_timer.c
@@ -184,6 +183,7 @@ static void mtk_timer_enable_irq(struct
mtk_clock_event_device *evt, u8 timer)
 {
 	u32 val;
 
+	writel(GPT_IRQ_ENABLE(timer), evt->gpt_base + GPT_IRQ_ACK_REG);
 	val = readl(evt->gpt_base + GPT_IRQ_EN_REG);
 	writel(val | GPT_IRQ_ENABLE(timer),
 			evt->gpt_base + GPT_IRQ_EN_REG);


Joe.C

[PATCH 2/7] clocksource: mediatek: Use GPT as sched clock source

[Yingjoe Chen]

When cpu is in deep idle, arch timer will stop counting. Setup GPT as
sched clock source so it can keep counting in idle.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 drivers/clocksource/mtk_timer.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
index 85e0ab5..9a90c7b 100644
--- a/drivers/clocksource/mtk_timer.c
+++ b/drivers/clocksource/mtk_timer.c
@@ -24,6 +24,7 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/sched_clock.h>
 #include <linux/slab.h>
 
 #define GPT_IRQ_EN_REG		0x00
@@ -59,6 +60,13 @@ struct mtk_clock_event_device {
 	struct clock_event_device dev;
 };
 
+static void __iomem *gpt_base __read_mostly;
+
+static u64 notrace mtk_read_sched_clock(void)
+{
+	return readl_relaxed(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC));
+}
+
 static inline struct mtk_clock_event_device *to_mtk_clk(
 				struct clock_event_device *c)
 {
@@ -239,6 +247,8 @@ static void __init mtk_timer_init(struct device_node *node)
 	mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN);
 	clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC),
 			node->name, rate, 300, 32, clocksource_mmio_readl_up);
+	gpt_base = evt->gpt_base;
+	sched_clock_register(mtk_read_sched_clock, 32, rate);
 
 	/* Configure clock event */
 	mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT);
-- 
1.8.1.1.dirty

[PATCH 3/7] arm: mediatek: enable gpt6 on boot up to make arch timer working

[Yingjoe Chen]

From: Matthias Brugger <matthias.bgg@gmail.com>

We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 arch/arm/mach-mediatek/mediatek.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
index a954900..6b38d67 100644
--- a/arch/arm/mach-mediatek/mediatek.c
+++ b/arch/arm/mach-mediatek/mediatek.c
@@ -16,6 +16,34 @@
  */
 #include <linux/init.h>
 #include <asm/mach/arch.h>
+#include <linux/of.h>
+#include <linux/clk-provider.h>
+#include <linux/clocksource.h>
+
+
+#define GPT6_CON_MT65xx 0x10008060
+#define GPT_ENABLE      0x31
+
+static void __init mediatek_timer_init(void)
+{
+	void __iomem *gpt_base = 0;
+
+	if (of_machine_is_compatible("mediatek,mt6589") ||
+	    of_machine_is_compatible("mediatek,mt8135") ||
+	    of_machine_is_compatible("mediatek,mt8127")) {
+		/* turn on GPT6 which ungates arch timer clocks */
+		gpt_base = ioremap(GPT6_CON_MT65xx, 0x04);
+	}
+
+	/* enabel clock and set to free-run */
+	if (gpt_base) {
+		writel(GPT_ENABLE, gpt_base);
+		iounmap(gpt_base);
+	}
+
+	of_clk_init(NULL);
+	clocksource_of_init();
+};
 
 static const char * const mediatek_board_dt_compat[] = {
 	"mediatek,mt6589",
@@ -27,4 +55,5 @@ static const char * const mediatek_board_dt_compat[] = {
 
 DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
 	.dt_compat	= mediatek_board_dt_compat,
+	.init_time	= mediatek_timer_init,
 MACHINE_END
-- 
1.8.1.1.dirty

[PATCH 4/7] devicetree: bindings: add new SMP enable method Mediatek SoC

[Yingjoe Chen]

This commit add new cpu enable method "mediatek,mt65xx-smp" and
"mediatek,mt81xx-tz-smp".

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 6aa331d..ac2903d 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -194,6 +194,8 @@ nodes to be present and contain the properties described below.
 			    "marvell,armada-380-smp"
 			    "marvell,armada-390-smp"
 			    "marvell,armada-xp-smp"
+			    "mediatek,mt65xx-smp"
+			    "mediatek,mt81xx-tz-smp"
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
-- 
1.8.1.1.dirty

[PATCH 5/7] ARM: mediatek: add smp bringup code

[Yingjoe Chen]

Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 arch/arm/mach-mediatek/Makefile  |   3 +
 arch/arm/mach-mediatek/platsmp.c | 145 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 148 insertions(+)
 create mode 100644 arch/arm/mach-mediatek/platsmp.c

diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
index 43e619f..2116460 100644
--- a/arch/arm/mach-mediatek/Makefile
+++ b/arch/arm/mach-mediatek/Makefile
@@ -1 +1,4 @@
+ifeq ($(CONFIG_SMP),y)
+obj-$(CONFIG_ARCH_MEDIATEK) += platsmp.o
+endif
 obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c
new file mode 100644
index 0000000..e266b3d
--- /dev/null
+++ b/arch/arm/mach-mediatek/platsmp.c
@@ -0,0 +1,145 @@
+/*
+ * arch/arm/mach-mediatek/platsmp.c
+ *
+ * Copyright (c) 2014 Mediatek Inc.
+ * Author: Shunli Wang <shunli.wang@mediatek.com>
+ *         Yingjoe Chen <yingjoe.chen@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/io.h>
+#include <linux/memblock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/string.h>
+#include <linux/threads.h>
+
+#define MTK_MAX_CPU		8
+#define MTK_SMP_REG_SIZE	0x1000
+
+struct mtk_smp_boot_info {
+	unsigned long smp_base;
+	unsigned int jump_reg;
+	unsigned int boot_reg;
+	unsigned int core_keys[MTK_MAX_CPU - 1];
+	unsigned int core_regs[MTK_MAX_CPU - 1];
+};
+
+static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
+	0x80002000, 1020, 1012,
+	{ 0x534c4131, 0x4c415332, 0x41534c33 },
+	{ 1016, 1016, 1016},
+};
+
+static const struct mtk_smp_boot_info mtk_mt6589_boot = {
+	0x10002000, 0x34, 0x30,
+	{ 0x534c4131, 0x4c415332, 0x41534c33 },
+	{ 0x38, 0x3c, 0x40 },
+};
+
+static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
+	{ .compatible   = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot },
+	{ .compatible   = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot },
+};
+
+static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
+	{ .compatible   = "mediatek,mt6589", .data = &mtk_mt6589_boot },
+};
+
+static void __iomem *mtk_smp_base;
+static const struct mtk_smp_boot_info *mtk_smp_info;
+
+static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+	if (!mtk_smp_base)
+		return -EINVAL;
+
+	if (!mtk_smp_info->core_keys[cpu-1])
+		return -EINVAL;
+
+	writel_relaxed(mtk_smp_info->core_keys[cpu-1],
+		mtk_smp_base + mtk_smp_info->core_regs[cpu-1]);
+
+	arch_send_wakeup_ipi_mask(cpumask_of(cpu));
+
+	return 0;
+}
+
+static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone)
+{
+	int i, num;
+	const struct of_device_id *infos;
+
+	if (trustzone) {
+		num = ARRAY_SIZE(mtk_tz_smp_boot_infos);
+		infos = mtk_tz_smp_boot_infos;
+	} else {
+		num = ARRAY_SIZE(mtk_smp_boot_infos);
+		infos = mtk_smp_boot_infos;
+	}
+
+	/* Find smp boot info for this SoC */
+	for (i = 0; i < num; i++) {
+		if (of_machine_is_compatible(infos[i].compatible)) {
+			mtk_smp_info = infos[i].data;
+			break;
+		}
+	}
+
+	if (!mtk_smp_info) {
+		pr_err("%s: Device is not supported\n", __func__);
+		return;
+	}
+
+	if (trustzone) {
+		if (memblock_reserve(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE)) {
+			pr_err("%s: Can't reserve smp memory\n", __func__);
+			return;
+		}
+		mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base);
+	} else {
+		mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE);
+		if (!mtk_smp_base) {
+			pr_err("%s: Can't remap %lx\n", __func__,
+				mtk_smp_info->smp_base);
+			return;
+		}
+	}
+
+	/*
+	 * write the address of slave startup address into the system-wide
+	 * jump register
+	 */
+	writel_relaxed(virt_to_phys(secondary_startup),
+			mtk_smp_base + mtk_smp_info->jump_reg);
+}
+
+static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus)
+{
+	__mtk_smp_prepare_cpus(max_cpus, 1);
+}
+
+static void __init mtk_smp_prepare_cpus(unsigned int max_cpus)
+{
+	__mtk_smp_prepare_cpus(max_cpus, 0);
+}
+
+static struct smp_operations mt81xx_tz_smp_ops __initdata = {
+	.smp_prepare_cpus = mtk_tz_smp_prepare_cpus,
+	.smp_boot_secondary = mtk_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops);
+
+static struct smp_operations mt65xx_smp_ops __initdata = {
+	.smp_prepare_cpus = mtk_smp_prepare_cpus,
+	.smp_boot_secondary = mtk_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(mt65xx_smp, "mediatek,mt65xx-smp", &mt65xx_smp_ops);
-- 
1.8.1.1.dirty

[PATCH 5/7] ARM: mediatek: add smp bringup code

[Matthias Brugger]

2015-05-01 9:43 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
> Add support for booting secondary CPUs on mt6589, mt8127
> and mt8135.
>
> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> ---
>  arch/arm/mach-mediatek/Makefile  |   3 +
>  arch/arm/mach-mediatek/platsmp.c | 145 +++++++++++++++++++++++++++++++++++++++
>  2 files changed, 148 insertions(+)
>  create mode 100644 arch/arm/mach-mediatek/platsmp.c
>
> diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
> index 43e619f..2116460 100644
> --- a/arch/arm/mach-mediatek/Makefile
> +++ b/arch/arm/mach-mediatek/Makefile
> @@ -1 +1,4 @@
> +ifeq ($(CONFIG_SMP),y)
> +obj-$(CONFIG_ARCH_MEDIATEK) += platsmp.o
> +endif
>  obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
> diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c
> new file mode 100644
> index 0000000..e266b3d
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/platsmp.c
> @@ -0,0 +1,145 @@
> +/*
> + * arch/arm/mach-mediatek/platsmp.c
> + *
> + * Copyright (c) 2014 Mediatek Inc.
> + * Author: Shunli Wang <shunli.wang@mediatek.com>
> + *         Yingjoe Chen <yingjoe.chen@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +#include <linux/io.h>
> +#include <linux/memblock.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/string.h>
> +#include <linux/threads.h>
> +
> +#define MTK_MAX_CPU            8
> +#define MTK_SMP_REG_SIZE       0x1000
> +
> +struct mtk_smp_boot_info {
> +       unsigned long smp_base;
> +       unsigned int jump_reg;
> +       unsigned int boot_reg;

This variable is not used, right?

> +       unsigned int core_keys[MTK_MAX_CPU - 1];
> +       unsigned int core_regs[MTK_MAX_CPU - 1];
> +};
> +
> +static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
> +       0x80002000, 1020, 1012,
> +       { 0x534c4131, 0x4c415332, 0x41534c33 },
> +       { 1016, 1016, 1016},

Please convert to hex values.

-- 
motzblog.wordpress.com

[PATCH 6/7] ARM: dts: mt8135: enable basic SMP bringup for mt8135

[Yingjoe Chen]

Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.

This also set cpu enable-method to enable SMP.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 arch/arm/boot/dts/mt8135.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index 612bd22..eb5e06f 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -46,6 +46,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "mediatek,mt81xx-tz-smp";
 
 		cpu0: cpu at 0 {
 			device_type = "cpu";
@@ -103,6 +104,21 @@
 		};
 	};
 
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>;
+		clock-frequency = <13000000>;
+		arm,cpu-registers-not-fw-configured;
+	};
+
 	soc {
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
1.8.1.1.dirty

[PATCH 6/7] ARM: dts: mt8135: enable basic SMP bringup for mt8135

[Matthias Brugger]

2015-05-01 9:43 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
> Add arch timer node to enable arch-timer support. MT8135 firmware
> doesn't correctly setup arch-timer frequency and CNTVOFF, add
> properties to workaround this.
>
> This also set cpu enable-method to enable SMP.
>
> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> ---
>  arch/arm/boot/dts/mt8135.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 612bd22..eb5e06f 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -46,6 +46,7 @@
>         cpus {
>                 #address-cells = <1>;
>                 #size-cells = <0>;
> +               enable-method = "mediatek,mt81xx-tz-smp";
>
>                 cpu0: cpu at 0 {
>                         device_type = "cpu";
> @@ -103,6 +104,21 @@
>                 };
>         };
>
> +       timer {
> +               compatible = "arm,armv7-timer";
> +               interrupt-parent = <&gic>;
> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
> +                                         IRQ_TYPE_LEVEL_LOW)>;
> +               clock-frequency = <13000000>;
> +               arm,cpu-registers-not-fw-configured;
> +       };
> +

This does not apply cleanly on v4.1-rc1, please rebase.

Thanks,
Matthias

[PATCH 6/7] ARM: dts: mt8135: enable basic SMP bringup for mt8135

[Sascha Hauer]

On Fri, May 01, 2015 at 03:43:29PM +0800, Yingjoe Chen wrote:
> Add arch timer node to enable arch-timer support. MT8135 firmware
> doesn't correctly setup arch-timer frequency and CNTVOFF, add
> properties to workaround this.
> 
> This also set cpu enable-method to enable SMP.
> 
> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> ---
>  arch/arm/boot/dts/mt8135.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 612bd22..eb5e06f 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -46,6 +46,7 @@
>  	cpus {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
> +		enable-method = "mediatek,mt81xx-tz-smp";
>  
>  		cpu0: cpu at 0 {
>  			device_type = "cpu";
> @@ -103,6 +104,21 @@
>  		};
>  	};
>  
> +	timer {
> +		compatible = "arm,armv7-timer";
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>;
> +		clock-frequency = <13000000>;
> +		arm,cpu-registers-not-fw-configured;
> +	};

This is the SoC dtsi file. What you say here is that all MT8135
present and future firmwares on all boards do this wrong.
Shouldn't you fix the firmware instead? Shouldn't this property be board
specific?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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[PATCH 6/7] ARM: dts: mt8135: enable basic SMP bringup for mt8135

[Yingjoe Chen]

On Mon, 2015-05-04 at 16:31 +0200, Sascha Hauer wrote:
> On Fri, May 01, 2015 at 03:43:29PM +0800, Yingjoe Chen wrote:
> > Add arch timer node to enable arch-timer support. MT8135 firmware
> > doesn't correctly setup arch-timer frequency and CNTVOFF, add
> > properties to workaround this.
> > 
> > This also set cpu enable-method to enable SMP.
> > 
> > Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> > ---
> >  arch/arm/boot/dts/mt8135.dtsi | 16 ++++++++++++++++
> >  1 file changed, 16 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> > index 612bd22..eb5e06f 100644
> > --- a/arch/arm/boot/dts/mt8135.dtsi
> > +++ b/arch/arm/boot/dts/mt8135.dtsi
> > @@ -46,6 +46,7 @@
> >  	cpus {
> >  		#address-cells = <1>;
> >  		#size-cells = <0>;
> > +		enable-method = "mediatek,mt81xx-tz-smp";
> >  
> >  		cpu0: cpu at 0 {
> >  			device_type = "cpu";
> > @@ -103,6 +104,21 @@
> >  		};
> >  	};
> >  
> > +	timer {
> > +		compatible = "arm,armv7-timer";
> > +		interrupt-parent = <&gic>;
> > +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> > +					  IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
> > +					  IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
> > +					  IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
> > +					  IRQ_TYPE_LEVEL_LOW)>;
> > +		clock-frequency = <13000000>;
> > +		arm,cpu-registers-not-fw-configured;
> > +	};
> 
> This is the SoC dtsi file. What you say here is that all MT8135
> present and future firmwares on all boards do this wrong.
> Shouldn't you fix the firmware instead? Shouldn't this property be board
> specific?

Hi Sascha,

To fix this we'll have to change initial boot code. Since 8135 or 8127
already MP for some time now, I'm afraid we won't be able to do that, even
for new boards. I can put it in board dts, but this means we'll have to
duplicate this in all board dts.

Joe.C

[PATCH 7/7] ARM: dts: mt8127: enable basic SMP bringup for mt8127

[Yingjoe Chen]

Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.

This also set cpu enable-method to enable SMP.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 arch/arm/boot/dts/mt8127.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
index aaa7862..7c2090d 100644
--- a/arch/arm/boot/dts/mt8127.dtsi
+++ b/arch/arm/boot/dts/mt8127.dtsi
@@ -23,6 +23,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "mediatek,mt81xx-tz-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
@@ -72,6 +73,21 @@
                 };
 	};
 
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>;
+		clock-frequency = <13000000>;
+		arm,cpu-registers-not-fw-configured;
+	};
+
 	soc {
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
1.8.1.1.dirty

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Matthias Brugger]

Hi Yingjoe,

2015-05-01 9:43 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
> This series add SMP brinup support for mediatek SoCs. This is based
> on v4.1-rc1.
>
> There are 2 similar but different SMP bringup up methods on Mediatek
> mt65xx and mt81xx. On MT8135 & MT8127, system boots with a trustzone
> firmware. Others, like MT6589, doesn't have trustzone, and run kernel
> directly in secure world.
>
> Patch 1~3 fix issues in mtk_timer(GPT) and enable arch timer support.
> Patch 4,5 add support for cpu enable-method "mediatek,mt65xx-smp" and
> "mediatek,mt81xx-tz-smp", which support Mediatek SMP bringup for non-TZ
> and TZ platform.
> Patch 6,7 finally enable SMP bringup for mt8135 and mt8127.
>
> Matthias Brugger (1):
>   arm: mediatek: enable gpt6 on boot up to make arch timer working
>
> Yingjoe Chen (6):
>   clocksource: mediatek: Don't run event_handler if it is NULL
>   clocksource: mediatek: Use GPT as sched clock source
>   devicetree: bindings: add new SMP enable method Mediatek SoC
>   ARM: mediatek: add smp bringup code
>   ARM: dts: mt8135: enable basic SMP bringup for mt8135
>   ARM: dts: mt8127: enable basic SMP bringup for mt8127
>

I tried on the mt8135 eval board but it fails to bring up the CPU.

When booting:
[    1.048588] CPU1: failed to come online
[    2.049914] CPU2: failed to come online
[    3.051245] CPU3: failed to come online

And from userspace:
/ # echo 1 > /sys/devices/system/cpu/cpu1/online
[   40.115142] CPU1: failed to come online
sh: write error: Input/output error
/ # echo 1 > /sys/devices/system/cpu/cpu2/online
[   44.667141] CPU2: failed to come online
sh: write error: Input/output error
/ # echo 1 > /sys/devices/system/cpu/cpu3/online
[   51.271141] CPU3: failed to come online
sh: write error: Input/output error

Please check again.

Cheers,
Matthias

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Yingjoe Chen]

Hi Matthias,

On Mon, 2015-05-04 at 09:48 +0200, Matthias Brugger wrote:
> Hi Yingjoe,
> 
> 2015-05-01 9:43 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
> > This series add SMP brinup support for mediatek SoCs. This is based
> > on v4.1-rc1.
> >
> > There are 2 similar but different SMP bringup up methods on Mediatek
> > mt65xx and mt81xx. On MT8135 & MT8127, system boots with a trustzone
> > firmware. Others, like MT6589, doesn't have trustzone, and run kernel
> > directly in secure world.
> >
> > Patch 1~3 fix issues in mtk_timer(GPT) and enable arch timer support.
> > Patch 4,5 add support for cpu enable-method "mediatek,mt65xx-smp" and
> > "mediatek,mt81xx-tz-smp", which support Mediatek SMP bringup for non-TZ
> > and TZ platform.
> > Patch 6,7 finally enable SMP bringup for mt8135 and mt8127.
> >
> > Matthias Brugger (1):
> >   arm: mediatek: enable gpt6 on boot up to make arch timer working
> >
> > Yingjoe Chen (6):
> >   clocksource: mediatek: Don't run event_handler if it is NULL
> >   clocksource: mediatek: Use GPT as sched clock source
> >   devicetree: bindings: add new SMP enable method Mediatek SoC
> >   ARM: mediatek: add smp bringup code
> >   ARM: dts: mt8135: enable basic SMP bringup for mt8135
> >   ARM: dts: mt8127: enable basic SMP bringup for mt8127
> >
> 
> I tried on the mt8135 eval board but it fails to bring up the CPU.
> 
> When booting:
> [    1.048588] CPU1: failed to come online
> [    2.049914] CPU2: failed to come online
> [    3.051245] CPU3: failed to come online


Thanks for testing, and the config file you provided.
It seems you are running THUMB2 kernel, unfortunately mt8135 trustzone
firmware doesn't support jump to THUMB2 code directly.

I can workaround this with the following patch. I'll include it in my
next round.

Joe.C

-----8<----------------
diff --git a/arch/arm/mach-mediatek/platsmp.c
b/arch/arm/mach-mediatek/platsmp.c
index e266b3d..5dea55a 100644
--- a/arch/arm/mach-mediatek/platsmp.c
+++ b/arch/arm/mach-mediatek/platsmp.c
@@ -57,6 +57,18 @@ static const struct of_device_id mtk_smp_boot_infos[]
__initconst = {
 static void __iomem *mtk_smp_base;
 static const struct mtk_smp_boot_info *mtk_smp_info;
 
+#ifdef CONFIG_THUMB2_KERNEL
+__asm__(
+	".arm\n"
+	"mtk_secondary_startup_fixup:\n"
+	"	b secondary_startup\n"
+	".thumb\n"
+);
+
+void mtk_secondary_startup_fixup(void);
+#define secondary_startup mtk_secondary_startup_fixup
+#endif
+
 static int mtk_boot_secondary(unsigned int cpu, struct task_struct
*idle)
 {
 	if (!mtk_smp_base)

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Yingjoe Chen]

On Wed, 2015-05-06 at 15:19 +0800, Yingjoe Chen wrote:
> Hi Matthias,
<...>
> > I tried on the mt8135 eval board but it fails to bring up the CPU.
> > 
> > When booting:
> > [    1.048588] CPU1: failed to come online
> > [    2.049914] CPU2: failed to come online
> > [    3.051245] CPU3: failed to come online
> 
> 
> Thanks for testing, and the config file you provided.
> It seems you are running THUMB2 kernel, unfortunately mt8135 trustzone
> firmware doesn't support jump to THUMB2 code directly.
> 
> I can workaround this with the following patch. I'll include it in my
> next round.
> 
> Joe.C
> 
> -----8<----------------
> diff --git a/arch/arm/mach-mediatek/platsmp.c
> b/arch/arm/mach-mediatek/platsmp.c
> index e266b3d..5dea55a 100644
> --- a/arch/arm/mach-mediatek/platsmp.c
> +++ b/arch/arm/mach-mediatek/platsmp.c
> @@ -57,6 +57,18 @@ static const struct of_device_id mtk_smp_boot_infos[]
> __initconst = {
>  static void __iomem *mtk_smp_base;
>  static const struct mtk_smp_boot_info *mtk_smp_info;
>  
> +#ifdef CONFIG_THUMB2_KERNEL
> +__asm__(
> +	".arm\n"
> +	"mtk_secondary_startup_fixup:\n"
> +	"	b secondary_startup\n"
> +	".thumb\n"
> +);
> +
> +void mtk_secondary_startup_fixup(void);
> +#define secondary_startup mtk_secondary_startup_fixup
> +#endif


Replying myself.

It seems kernel already have secondary_startup_arm which support this
usage. I'll use that in my next version instead.

Joe.C

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Matthias Brugger]

2015-05-06 9:59 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
> On Wed, 2015-05-06 at 15:19 +0800, Yingjoe Chen wrote:
>> Hi Matthias,
> <...>
>> > I tried on the mt8135 eval board but it fails to bring up the CPU.
>> >
>> > When booting:
>> > [    1.048588] CPU1: failed to come online
>> > [    2.049914] CPU2: failed to come online
>> > [    3.051245] CPU3: failed to come online
>>
>>
>> Thanks for testing, and the config file you provided.
>> It seems you are running THUMB2 kernel, unfortunately mt8135 trustzone
>> firmware doesn't support jump to THUMB2 code directly.
>>
>> I can workaround this with the following patch. I'll include it in my
>> next round.
>>
>> Joe.C
>>
>> -----8<----------------
>> diff --git a/arch/arm/mach-mediatek/platsmp.c
>> b/arch/arm/mach-mediatek/platsmp.c
>> index e266b3d..5dea55a 100644
>> --- a/arch/arm/mach-mediatek/platsmp.c
>> +++ b/arch/arm/mach-mediatek/platsmp.c
>> @@ -57,6 +57,18 @@ static const struct of_device_id mtk_smp_boot_infos[]
>> __initconst = {
>>  static void __iomem *mtk_smp_base;
>>  static const struct mtk_smp_boot_info *mtk_smp_info;
>>
>> +#ifdef CONFIG_THUMB2_KERNEL
>> +__asm__(
>> +     ".arm\n"
>> +     "mtk_secondary_startup_fixup:\n"
>> +     "       b secondary_startup\n"
>> +     ".thumb\n"
>> +);
>> +
>> +void mtk_secondary_startup_fixup(void);
>> +#define secondary_startup mtk_secondary_startup_fixup
>> +#endif
>
>
> Replying myself.
>
> It seems kernel already have secondary_startup_arm which support this
> usage. I'll use that in my next version instead.

With this I was able to get the board up and running. I will try mt6589 ASAP.

-- 
motzblog.wordpress.com

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Matthias Brugger]

Hi Joe,

2015-05-06 10:29 GMT+02:00 Matthias Brugger <matthias.bgg@gmail.com>:
> 2015-05-06 9:59 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
>> On Wed, 2015-05-06 at 15:19 +0800, Yingjoe Chen wrote:
>>> Hi Matthias,
>> <...>
>>> > I tried on the mt8135 eval board but it fails to bring up the CPU.
>>> >
>>> > When booting:
>>> > [    1.048588] CPU1: failed to come online
>>> > [    2.049914] CPU2: failed to come online
>>> > [    3.051245] CPU3: failed to come online
>>>
>>>
>>> Thanks for testing, and the config file you provided.
>>> It seems you are running THUMB2 kernel, unfortunately mt8135 trustzone
>>> firmware doesn't support jump to THUMB2 code directly.
>>>
>>> I can workaround this with the following patch. I'll include it in my
>>> next round.
>>>
>>> Joe.C
>>>
>>> -----8<----------------
>>> diff --git a/arch/arm/mach-mediatek/platsmp.c
>>> b/arch/arm/mach-mediatek/platsmp.c
>>> index e266b3d..5dea55a 100644
>>> --- a/arch/arm/mach-mediatek/platsmp.c
>>> +++ b/arch/arm/mach-mediatek/platsmp.c
>>> @@ -57,6 +57,18 @@ static const struct of_device_id mtk_smp_boot_infos[]
>>> __initconst = {
>>>  static void __iomem *mtk_smp_base;
>>>  static const struct mtk_smp_boot_info *mtk_smp_info;
>>>
>>> +#ifdef CONFIG_THUMB2_KERNEL
>>> +__asm__(
>>> +     ".arm\n"
>>> +     "mtk_secondary_startup_fixup:\n"
>>> +     "       b secondary_startup\n"
>>> +     ".thumb\n"
>>> +);
>>> +
>>> +void mtk_secondary_startup_fixup(void);
>>> +#define secondary_startup mtk_secondary_startup_fixup
>>> +#endif
>>
>>
>> Replying myself.
>>
>> It seems kernel already have secondary_startup_arm which support this
>> usage. I'll use that in my next version instead.
>
> With this I was able to get the board up and running. I will try mt6589 ASAP.

I just realized, that your aforementioned patch for the THUMB2 kernel
breaks SMP on mt6589. Strangely without this patch it works fine.

Regrads,
Matthias

-- 
motzblog.wordpress.com

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Yingjoe Chen]

On Wed, 2015-05-06 at 13:04 +0200, Matthias Brugger wrote:
> Hi Joe,
> 
> 2015-05-06 10:29 GMT+02:00 Matthias Brugger <matthias.bgg@gmail.com>:
> > 2015-05-06 9:59 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
> >> On Wed, 2015-05-06 at 15:19 +0800, Yingjoe Chen wrote:
> >>> Hi Matthias,
> >> <...>
> >>> > I tried on the mt8135 eval board but it fails to bring up the CPU.
> >>> >
> >>> > When booting:
> >>> > [    1.048588] CPU1: failed to come online
> >>> > [    2.049914] CPU2: failed to come online
> >>> > [    3.051245] CPU3: failed to come online
> >>>
> >>>
> >>> Thanks for testing, and the config file you provided.
> >>> It seems you are running THUMB2 kernel, unfortunately mt8135 trustzone
> >>> firmware doesn't support jump to THUMB2 code directly.
> >>>
> >>> I can workaround this with the following patch. I'll include it in my
> >>> next round.
> >>>
> >>> Joe.C
> >>>
> >>> -----8<----------------
> >>> diff --git a/arch/arm/mach-mediatek/platsmp.c
> >>> b/arch/arm/mach-mediatek/platsmp.c
> >>> index e266b3d..5dea55a 100644
> >>> --- a/arch/arm/mach-mediatek/platsmp.c
> >>> +++ b/arch/arm/mach-mediatek/platsmp.c
> >>> @@ -57,6 +57,18 @@ static const struct of_device_id mtk_smp_boot_infos[]
> >>> __initconst = {
> >>>  static void __iomem *mtk_smp_base;
> >>>  static const struct mtk_smp_boot_info *mtk_smp_info;
> >>>
> >>> +#ifdef CONFIG_THUMB2_KERNEL
> >>> +__asm__(
> >>> +     ".arm\n"
> >>> +     "mtk_secondary_startup_fixup:\n"
> >>> +     "       b secondary_startup\n"
> >>> +     ".thumb\n"
> >>> +);
> >>> +
> >>> +void mtk_secondary_startup_fixup(void);
> >>> +#define secondary_startup mtk_secondary_startup_fixup
> >>> +#endif
> >>
> >>
> >> Replying myself.
> >>
> >> It seems kernel already have secondary_startup_arm which support this
> >> usage. I'll use that in my next version instead.
> >
> > With this I was able to get the board up and running. I will try mt6589 ASAP.
> 
> I just realized, that your aforementioned patch for the THUMB2 kernel
> breaks SMP on mt6589. Strangely without this patch it works fine.
> 

Hi Matthias,

Unfortunately I can't reproduce or figure out why this could happen.
I change to use common kernel code secondary_startup_arm in new series,
could you that a try?
Thanks.

Joe.C

[PATCH 0/7] Add SMP bringup support for mt65xx socs

[Matthias Brugger]

2015-05-16 10:09 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
> On Wed, 2015-05-06 at 13:04 +0200, Matthias Brugger wrote:
>> Hi Joe,
>>
>> 2015-05-06 10:29 GMT+02:00 Matthias Brugger <matthias.bgg@gmail.com>:
>> > 2015-05-06 9:59 GMT+02:00 Yingjoe Chen <yingjoe.chen@mediatek.com>:
>> >> On Wed, 2015-05-06 at 15:19 +0800, Yingjoe Chen wrote:
>> >>> Hi Matthias,
>> >> <...>
>> >>> > I tried on the mt8135 eval board but it fails to bring up the CPU.
>> >>> >
>> >>> > When booting:
>> >>> > [    1.048588] CPU1: failed to come online
>> >>> > [    2.049914] CPU2: failed to come online
>> >>> > [    3.051245] CPU3: failed to come online
>> >>>
>> >>>
>> >>> Thanks for testing, and the config file you provided.
>> >>> It seems you are running THUMB2 kernel, unfortunately mt8135 trustzone
>> >>> firmware doesn't support jump to THUMB2 code directly.
>> >>>
>> >>> I can workaround this with the following patch. I'll include it in my
>> >>> next round.
>> >>>
>> >>> Joe.C
>> >>>
>> >>> -----8<----------------
>> >>> diff --git a/arch/arm/mach-mediatek/platsmp.c
>> >>> b/arch/arm/mach-mediatek/platsmp.c
>> >>> index e266b3d..5dea55a 100644
>> >>> --- a/arch/arm/mach-mediatek/platsmp.c
>> >>> +++ b/arch/arm/mach-mediatek/platsmp.c
>> >>> @@ -57,6 +57,18 @@ static const struct of_device_id mtk_smp_boot_infos[]
>> >>> __initconst = {
>> >>>  static void __iomem *mtk_smp_base;
>> >>>  static const struct mtk_smp_boot_info *mtk_smp_info;
>> >>>
>> >>> +#ifdef CONFIG_THUMB2_KERNEL
>> >>> +__asm__(
>> >>> +     ".arm\n"
>> >>> +     "mtk_secondary_startup_fixup:\n"
>> >>> +     "       b secondary_startup\n"
>> >>> +     ".thumb\n"
>> >>> +);
>> >>> +
>> >>> +void mtk_secondary_startup_fixup(void);
>> >>> +#define secondary_startup mtk_secondary_startup_fixup
>> >>> +#endif
>> >>
>> >>
>> >> Replying myself.
>> >>
>> >> It seems kernel already have secondary_startup_arm which support this
>> >> usage. I'll use that in my next version instead.
>> >
>> > With this I was able to get the board up and running. I will try mt6589 ASAP.
>>
>> I just realized, that your aforementioned patch for the THUMB2 kernel
>> breaks SMP on mt6589. Strangely without this patch it works fine.
>>
>
> Hi Matthias,
>
> Unfortunately I can't reproduce or figure out why this could happen.
> I change to use common kernel code secondary_startup_arm in new series,
> could you that a try?
> Thanks.

I just tried it on mt6589 and mt8135 and its works on both.
Actually if you revert patch 1/9 SMP on mt6589 stops working.

Thanks,
Matthias

-- 
motzblog.wordpress.com