ARM64: dts: Mediatek: MT8173 updates

ARM64: dts: Mediatek: MT8173 updates

[Sascha Hauer]

This series contains dts updates for Mediatek MT8173 for Linux 4.2.
The clock code and the PMIC wrapper are sitting in Linux next, this
series adds the dts updates to make use of this code.

Sascha

----------------------------------------------------------------
Sascha Hauer (3):
      ARM64: dts: mt8173: Add clock controller device nodes
      ARM64: dts: mt8173: Use real clock for UARTs
      ARM64: dts: mt8173: Add PMIC wrapper device node

 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 61 +++++++++++++++++++++++++++++---
 1 file changed, 56 insertions(+), 5 deletions(-)

[PATCH 1/3] ARM64: dts: mt8173: Add clock controller device nodes

[Sascha Hauer]

This adds the device nodes providing clocks on the Mediatek MT8173.
These are: topckgen, infracfg, pericfg and apmixedsys. These are
fed by two oscillators also added by this patch.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 41 ++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 924fdb6..30ac8dd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -14,6 +14,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include "mt8173-pinfunc.h"
+#include <dt-bindings/clock/mt8173-clk.h>
 
 / {
 	compatible = "mediatek,mt8173";
@@ -87,6 +88,20 @@
 		#clock-cells = <0>;
 	};
 
+	clk26m: oscillator at 0 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <26000000>;
+		clock-output-names = "clk26m";
+	};
+
+	clk32k: oscillator at 1 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32000>;
+		clock-output-names = "clk32k";
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupt-parent = <&gic>;
@@ -106,6 +121,26 @@
 		compatible = "simple-bus";
 		ranges;
 
+		topckgen: clock-controller at 10000000 {
+			compatible = "mediatek,mt8173-topckgen";
+			reg = <0 0x10000000 0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		infracfg: power-controller at 10001000 {
+			compatible = "mediatek,mt8173-infracfg", "syscon";
+			reg = <0 0x10001000 0 0x1000>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
+		pericfg: power-controller at 10003000 {
+			compatible = "mediatek,mt8173-pericfg", "syscon";
+			reg = <0 0x10003000 0 0x1000>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
 		syscfg_pctl_a: syscfg_pctl_a at 10005000 {
 			compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
 			reg = <0 0x10005000 0 0x1000>;
@@ -134,6 +169,12 @@
 			reg = <0 0x10200620 0 0x20>;
 		};
 
+		apmixedsys: clock-controller at 10209000 {
+			compatible = "mediatek,mt8173-apmixedsys";
+			reg = <0 0x10209000 0 0x1000>;
+			#clock-cells = <1>;
+		};
+
 		gic: interrupt-controller at 10220000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
-- 
2.1.4

[PATCH 1/3] ARM64: dts: mt8173: Add clock controller device nodes

[Daniel Kurtz]

On Tue, May 19, 2015 at 6:53 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> This adds the device nodes providing clocks on the Mediatek MT8173.
> These are: topckgen, infracfg, pericfg and apmixedsys. These are
> fed by two oscillators also added by this patch.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 41 ++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 924fdb6..30ac8dd 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -14,6 +14,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include "mt8173-pinfunc.h"
> +#include <dt-bindings/clock/mt8173-clk.h>

nit: alphabetize headers

With that fixed, this one is:
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>

>
>  / {
>         compatible = "mediatek,mt8173";
> @@ -87,6 +88,20 @@
>                 #clock-cells = <0>;
>         };
>
> +       clk26m: oscillator at 0 {
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <26000000>;
> +               clock-output-names = "clk26m";
> +       };
> +
> +       clk32k: oscillator at 1 {
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <32000>;
> +               clock-output-names = "clk32k";
> +       };
> +
>         timer {
>                 compatible = "arm,armv8-timer";
>                 interrupt-parent = <&gic>;
> @@ -106,6 +121,26 @@
>                 compatible = "simple-bus";
>                 ranges;
>
> +               topckgen: clock-controller at 10000000 {
> +                       compatible = "mediatek,mt8173-topckgen";
> +                       reg = <0 0x10000000 0 0x1000>;
> +                       #clock-cells = <1>;
> +               };
> +
> +               infracfg: power-controller at 10001000 {
> +                       compatible = "mediatek,mt8173-infracfg", "syscon";
> +                       reg = <0 0x10001000 0 0x1000>;
> +                       #clock-cells = <1>;
> +                       #reset-cells = <1>;
> +               };
> +
> +               pericfg: power-controller at 10003000 {
> +                       compatible = "mediatek,mt8173-pericfg", "syscon";
> +                       reg = <0 0x10003000 0 0x1000>;
> +                       #clock-cells = <1>;
> +                       #reset-cells = <1>;
> +               };
> +
>                 syscfg_pctl_a: syscfg_pctl_a at 10005000 {
>                         compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
>                         reg = <0 0x10005000 0 0x1000>;
> @@ -134,6 +169,12 @@
>                         reg = <0 0x10200620 0 0x20>;
>                 };
>
> +               apmixedsys: clock-controller at 10209000 {
> +                       compatible = "mediatek,mt8173-apmixedsys";
> +                       reg = <0 0x10209000 0 0x1000>;
> +                       #clock-cells = <1>;
> +               };
> +
>                 gic: interrupt-controller at 10220000 {
>                         compatible = "arm,gic-400";
>                         #interrupt-cells = <3>;
> --
> 2.1.4
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

[PATCH 2/3] ARM64: dts: mt8173: Use real clock for UARTs

[Sascha Hauer]

We used to use a fixed rate clock for the UARTs. Now that we have clock
support we can associate the correct clocks to the UARTs and drop the
26MHz fixed rate UART clock.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 30ac8dd..cfdca03 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -82,12 +82,6 @@
 		cpu_on	      = <0x84000003>;
 	};
 
-	uart_clk: dummy26m {
-		compatible = "fixed-clock";
-		clock-frequency = <26000000>;
-		#clock-cells = <0>;
-	};
-
 	clk26m: oscillator at 0 {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -193,7 +187,8 @@
 					"mediatek,mt6577-uart";
 			reg = <0 0x11002000 0 0x400>;
 			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
+			clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 
@@ -202,7 +197,8 @@
 					"mediatek,mt6577-uart";
 			reg = <0 0x11003000 0 0x400>;
 			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
+			clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 
@@ -211,7 +207,8 @@
 					"mediatek,mt6577-uart";
 			reg = <0 0x11004000 0 0x400>;
 			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
+			clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 
@@ -220,7 +217,8 @@
 					"mediatek,mt6577-uart";
 			reg = <0 0x11005000 0 0x400>;
 			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
+			clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 	};
-- 
2.1.4

[PATCH 3/3] ARM64: dts: mt8173: Add PMIC wrapper device node

[Sascha Hauer]

This adds the device node for the PMIC wrapper.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index cfdca03..16ec639 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -14,6 +14,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include "mt8173-pinfunc.h"
+#include <dt-bindings/reset-controller/mt8173-resets.h>
 #include <dt-bindings/clock/mt8173-clk.h>
 
 / {
@@ -154,6 +155,17 @@
 						<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		pwrap: pwrap at 1000D000 {
+			compatible = "mediatek,mt8173-pwrap";
+			reg = <0 0x1000D000 0 0x1000>;
+			reg-names = "pwrap";
+			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+			resets = <&infracfg MT8173_INFRA_PMIC_WRAP_RST>;
+			reset-names = "pwrap";
+			clocks = <&infracfg CLK_INFRA_PMICSPI>, <&infracfg CLK_INFRA_PMICWRAP>;
+			clock-names = "spi", "wrap";
+		};
+
 		sysirq: intpol-controller at 10200620 {
 			compatible = "mediatek,mt8173-sysirq",
 					"mediatek,mt6577-sysirq";
-- 
2.1.4

[PATCH 3/3] ARM64: dts: mt8173: Add PMIC wrapper device node

[Daniel Kurtz]

On Tue, May 19, 2015 at 6:53 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> This adds the device node for the PMIC wrapper.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index cfdca03..16ec639 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -14,6 +14,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include "mt8173-pinfunc.h"
> +#include <dt-bindings/reset-controller/mt8173-resets.h>
>  #include <dt-bindings/clock/mt8173-clk.h>
>
>  / {
> @@ -154,6 +155,17 @@
>                                                 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
>                 };
>
> +               pwrap: pwrap at 1000D000 {
> +                       compatible = "mediatek,mt8173-pwrap";
> +                       reg = <0 0x1000D000 0 0x1000>;

nit: Use lowercase for the hex value 'd' in reg and pwrap@<>.

With that fixed, this one is:
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>


> +                       reg-names = "pwrap";
> +                       interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> +                       resets = <&infracfg MT8173_INFRA_PMIC_WRAP_RST>;
> +                       reset-names = "pwrap";
> +                       clocks = <&infracfg CLK_INFRA_PMICSPI>, <&infracfg CLK_INFRA_PMICWRAP>;
> +                       clock-names = "spi", "wrap";
> +               };
> +
>                 sysirq: intpol-controller at 10200620 {
>                         compatible = "mediatek,mt8173-sysirq",
>                                         "mediatek,mt6577-sysirq";
> --
> 2.1.4
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

[PATCH 3/3] ARM64: dts: mt8173: Add PMIC wrapper device node

[Daniel Kurtz]

On Wed, May 20, 2015 at 4:44 PM, Daniel Kurtz <djkurtz@chromium.org> wrote:
> On Tue, May 19, 2015 at 6:53 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
>> This adds the device node for the PMIC wrapper.
>>
>> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
>> ---
>>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
>> index cfdca03..16ec639 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
>> @@ -14,6 +14,7 @@
>>  #include <dt-bindings/interrupt-controller/irq.h>
>>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>>  #include "mt8173-pinfunc.h"
>> +#include <dt-bindings/reset-controller/mt8173-resets.h>
>>  #include <dt-bindings/clock/mt8173-clk.h>
>>
>>  / {
>> @@ -154,6 +155,17 @@
>>                                                 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
>>                 };
>>
>> +               pwrap: pwrap at 1000D000 {
>> +                       compatible = "mediatek,mt8173-pwrap";
>> +                       reg = <0 0x1000D000 0 0x1000>;
>
> nit: Use lowercase for the hex value 'd' in reg and pwrap@<>.
>
> With that fixed, this one is:
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>

FYI: the patches in this set no longer apply cleanly onto Matthias'
https://github.com/mbgg/linux-mediatek v4.1-next/arm64

Due to collisions with:

commit 6769b93c082afb7241708685f1c23cbaf5bf00eb
Author:     Yingjoe Chen <yingjoe.chen@mediatek.com>
Commit:     Matthias Brugger <matthias.bgg@gmail.com>
    arm64: dts: mt8173: Fixup pinctrl nodes


>> +                       reg-names = "pwrap";
>> +                       interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
>> +                       resets = <&infracfg MT8173_INFRA_PMIC_WRAP_RST>;
>> +                       reset-names = "pwrap";
>> +                       clocks = <&infracfg CLK_INFRA_PMICSPI>, <&infracfg CLK_INFRA_PMICWRAP>;
>> +                       clock-names = "spi", "wrap";
>> +               };
>> +
>>                 sysirq: intpol-controller at 10200620 {
>>                         compatible = "mediatek,mt8173-sysirq",
>>                                         "mediatek,mt6577-sysirq";
>> --
>> 2.1.4
>>
>>
>> _______________________________________________
>> Linux-mediatek mailing list
>> Linux-mediatek at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-mediatek