From: shawn.guo@linaro.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 10/12] ARM: imx: provide gpt device specific irq functions
Date: Fri, 22 May 2015 23:29:57 +0800 [thread overview]
Message-ID: <1432308599-28643-11-git-send-email-shawn.guo@linaro.org> (raw)
In-Reply-To: <1432308599-28643-1-git-send-email-shawn.guo@linaro.org>
It splits irq enable/disable/acknowledge operations into device specific
functions as the hooks in imx_gpt_data, so that we can save the use of
timer_is_xxx() and cpu_is_xxx() checking in these irq functions.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
arch/arm/mach-imx/time.c | 80 ++++++++++++++++++++++++++++++++----------------
1 file changed, 54 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index a4f12c75050f..5fb8397d8fe2 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -100,6 +100,9 @@ struct imx_gpt_data {
int reg_tcn;
int reg_tcmp;
void (*gpt_setup_tctl)(struct imx_timer *imxtm);
+ void (*gpt_irq_enable)(struct imx_timer *imxtm);
+ void (*gpt_irq_disable)(struct imx_timer *imxtm);
+ void (*gpt_irq_acknowledge)(struct imx_timer *imxtm);
int (*set_next_event)(unsigned long evt,
struct clock_event_device *ced);
};
@@ -109,40 +112,53 @@ static inline struct imx_timer *to_imx_timer(struct clock_event_device *ced)
return container_of(ced, struct imx_timer, ced);
}
-static inline void gpt_irq_disable(struct imx_timer *imxtm)
+static void imx1_gpt_irq_disable(struct imx_timer *imxtm)
{
unsigned int tmp;
- if (timer_is_v2())
- writel_relaxed(0, imxtm->base + V2_IR);
- else {
- tmp = readl_relaxed(imxtm->base + MXC_TCTL);
- writel_relaxed(tmp & ~MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL);
- }
+ tmp = readl_relaxed(imxtm->base + MXC_TCTL);
+ writel_relaxed(tmp & ~MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL);
}
+#define imx21_gpt_irq_disable imx1_gpt_irq_disable
-static inline void gpt_irq_enable(struct imx_timer *imxtm)
+static void imx31_gpt_irq_disable(struct imx_timer *imxtm)
{
- if (timer_is_v2())
- writel_relaxed(1<<0, imxtm->base + V2_IR);
- else {
- writel_relaxed(readl_relaxed(imxtm->base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
- imxtm->base + MXC_TCTL);
- }
+ writel_relaxed(0, imxtm->base + V2_IR);
+}
+#define imx6dl_gpt_irq_disable imx31_gpt_irq_disable
+
+static void imx1_gpt_irq_enable(struct imx_timer *imxtm)
+{
+ unsigned int tmp;
+
+ tmp = readl_relaxed(imxtm->base + MXC_TCTL);
+ writel_relaxed(tmp | MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL);
+}
+#define imx21_gpt_irq_enable imx1_gpt_irq_enable
+
+static void imx31_gpt_irq_enable(struct imx_timer *imxtm)
+{
+ writel_relaxed(1<<0, imxtm->base + V2_IR);
+}
+#define imx6dl_gpt_irq_enable imx31_gpt_irq_enable
+
+static void imx1_gpt_irq_acknowledge(struct imx_timer *imxtm)
+{
+ writel_relaxed(0, imxtm->base + MX1_2_TSTAT);
}
-static void gpt_irq_acknowledge(struct imx_timer *imxtm)
+static void imx21_gpt_irq_acknowledge(struct imx_timer *imxtm)
{
- if (timer_is_v1()) {
- if (cpu_is_mx1())
- writel_relaxed(0, imxtm->base + MX1_2_TSTAT);
- else
- writel_relaxed(MX2_TSTAT_CAPT | MX2_TSTAT_COMP,
+ writel_relaxed(MX2_TSTAT_CAPT | MX2_TSTAT_COMP,
imxtm->base + MX1_2_TSTAT);
- } else if (timer_is_v2())
- writel_relaxed(V2_TSTAT_OF1, imxtm->base + V2_TSTAT);
}
+static void imx31_gpt_irq_acknowledge(struct imx_timer *imxtm)
+{
+ writel_relaxed(V2_TSTAT_OF1, imxtm->base + V2_TSTAT);
+}
+#define imx6dl_gpt_irq_acknowledge imx31_gpt_irq_acknowledge
+
static void __iomem *sched_clock_reg;
static u64 notrace mxc_read_sched_clock(void)
@@ -227,7 +243,7 @@ static void mxc_set_mode(enum clock_event_mode mode,
local_irq_save(flags);
/* Disable interrupt in GPT module */
- gpt_irq_disable(imxtm);
+ imxtm->gpt->gpt_irq_disable(imxtm);
if (mode != imxtm->cem) {
u32 tcn = readl_relaxed(imxtm->base + imxtm->gpt->reg_tcn);
@@ -235,7 +251,7 @@ static void mxc_set_mode(enum clock_event_mode mode,
writel_relaxed(tcn - 3, imxtm->base + imxtm->gpt->reg_tcmp);
/* Clear pending interrupt */
- gpt_irq_acknowledge(imxtm);
+ imxtm->gpt->gpt_irq_acknowledge(imxtm);
}
#ifdef DEBUG
@@ -261,7 +277,7 @@ static void mxc_set_mode(enum clock_event_mode mode,
* mode switching
*/
local_irq_save(flags);
- gpt_irq_enable(imxtm);
+ imxtm->gpt->gpt_irq_enable(imxtm);
local_irq_restore(flags);
break;
case CLOCK_EVT_MODE_SHUTDOWN:
@@ -283,7 +299,7 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
tstat = readl_relaxed(imxtm->base + imxtm->gpt->reg_tstat);
- gpt_irq_acknowledge(imxtm);
+ imxtm->gpt->gpt_irq_acknowledge(imxtm);
ced->event_handler(ced);
@@ -357,6 +373,9 @@ static const struct imx_gpt_data imx1_gpt_data = {
.reg_tstat = MX1_2_TSTAT,
.reg_tcn = MX1_2_TCN,
.reg_tcmp = MX1_2_TCMP,
+ .gpt_irq_enable = imx1_gpt_irq_enable,
+ .gpt_irq_disable = imx1_gpt_irq_disable,
+ .gpt_irq_acknowledge = imx1_gpt_irq_acknowledge,
.gpt_setup_tctl = imx1_gpt_setup_tctl,
.set_next_event = mx1_2_set_next_event,
};
@@ -365,6 +384,9 @@ static const struct imx_gpt_data imx21_gpt_data = {
.reg_tstat = MX1_2_TSTAT,
.reg_tcn = MX1_2_TCN,
.reg_tcmp = MX1_2_TCMP,
+ .gpt_irq_enable = imx21_gpt_irq_enable,
+ .gpt_irq_disable = imx21_gpt_irq_disable,
+ .gpt_irq_acknowledge = imx21_gpt_irq_acknowledge,
.gpt_setup_tctl = imx21_gpt_setup_tctl,
.set_next_event = mx1_2_set_next_event,
};
@@ -373,6 +395,9 @@ static const struct imx_gpt_data imx31_gpt_data = {
.reg_tstat = V2_TSTAT,
.reg_tcn = V2_TCN,
.reg_tcmp = V2_TCMP,
+ .gpt_irq_enable = imx31_gpt_irq_enable,
+ .gpt_irq_disable = imx31_gpt_irq_disable,
+ .gpt_irq_acknowledge = imx31_gpt_irq_acknowledge,
.gpt_setup_tctl = imx31_gpt_setup_tctl,
.set_next_event = v2_set_next_event,
};
@@ -381,6 +406,9 @@ static const struct imx_gpt_data imx6dl_gpt_data = {
.reg_tstat = V2_TSTAT,
.reg_tcn = V2_TCN,
.reg_tcmp = V2_TCMP,
+ .gpt_irq_enable = imx6dl_gpt_irq_enable,
+ .gpt_irq_disable = imx6dl_gpt_irq_disable,
+ .gpt_irq_acknowledge = imx6dl_gpt_irq_acknowledge,
.gpt_setup_tctl = imx6dl_gpt_setup_tctl,
.set_next_event = v2_set_next_event,
};
--
1.9.1
next prev parent reply other threads:[~2015-05-22 15:29 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-22 15:29 [PATCH v2 00/12] ARM: imx: move timer driver into drivers/clocksource Shawn Guo
2015-05-22 15:29 ` [PATCH v2 01/12] ARM: imx: use relaxed IO accessor in timer driver Shawn Guo
2015-05-22 15:29 ` [PATCH v2 02/12] ARM: imx: move timer resources into a structure Shawn Guo
2015-05-22 15:29 ` [PATCH v2 03/12] ARM: imx: define an enum for gpt timer device type Shawn Guo
2015-05-22 15:29 ` [PATCH v2 04/12] ARM: imx: initialize gpt device type for DT boot Shawn Guo
2015-05-22 15:29 ` [PATCH v2 05/12] ARM: imx: setup tctl register in device specific function Shawn Guo
2015-06-01 23:53 ` Kevin Hilman
2015-06-02 1:11 ` Shawn Guo
2015-06-02 15:56 ` Kevin Hilman
2015-06-03 6:16 ` Shawn Guo
2015-06-03 17:41 ` Kevin Hilman
2015-06-04 1:18 ` Shawn Guo
2015-05-22 15:29 ` [PATCH v2 06/12] ARM: imx: set up .set_next_event hook via imx_gpt_data Shawn Guo
2015-05-22 15:29 ` [PATCH v2 07/12] ARM: imx: move clock event variables into imx_timer Shawn Guo
2015-05-22 15:29 ` [PATCH v2 08/12] ARM: imx: define gpt register offset per device type Shawn Guo
2015-05-22 15:29 ` [PATCH v2 09/12] ARM: imx: get rid of variable timer_base Shawn Guo
2015-05-22 15:29 ` Shawn Guo [this message]
2015-05-22 15:29 ` [PATCH v2 11/12] ARM: imx: remove platform headers from timer driver Shawn Guo
2015-05-22 15:29 ` [PATCH v2 12/12] ARM: imx: move timer driver into drivers/clocksource Shawn Guo
2015-05-22 18:28 ` Shenwei Wang
2015-05-25 5:19 ` Shawn Guo
2015-05-25 5:14 ` [PATCH v3 " Shawn Guo
2015-05-27 3:11 ` Shawn Guo
2015-05-27 12:50 ` Daniel Lezcano
2015-05-27 14:04 ` Shawn Guo
2015-05-27 23:39 ` Daniel Lezcano
2015-05-28 1:18 ` Shawn Guo
2015-05-28 8:20 ` Daniel Lezcano
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