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From: hanjun.guo@linaro.org (Hanjun Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 9/9] irqchip / GICv3: Add stacked irqdomain support for ACPI based init
Date: Fri, 19 Jun 2015 16:46:12 +0800	[thread overview]
Message-ID: <1434703572-26221-10-git-send-email-hanjun.guo@linaro.org> (raw)
In-Reply-To: <1434703572-26221-1-git-send-email-hanjun.guo@linaro.org>

Similar as stacked domain support for ACPI based GICv2 init, let
acpi_irq_domain point to the core domain of GICv3 and pass the
gsi as the arg to support stacked irqdomain.

Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
---
 drivers/irqchip/irq-gic-v3.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index d2eef3c..a1c4c74 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -733,15 +733,21 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
 static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
 				unsigned int nr_irqs, void *arg)
 {
-	int i, ret;
+	int i;
 	irq_hw_number_t hwirq;
-	unsigned int type = IRQ_TYPE_NONE;
-	struct of_phandle_args *irq_data = arg;
 
-	ret = gic_irq_domain_xlate(domain, irq_data->np, irq_data->args,
-				   irq_data->args_count, &hwirq, &type);
-	if (ret)
-		return ret;
+	if (domain->of_node) {	/* DT case */
+		int ret;
+		unsigned int type = IRQ_TYPE_NONE;
+		struct of_phandle_args *irq_data = arg;
+
+		ret = gic_irq_domain_xlate(domain, irq_data->np, irq_data->args,
+					   irq_data->args_count, &hwirq, &type);
+		if (ret)
+			return ret;
+	} else {	/* ACPI case */
+		hwirq = (irq_hw_number_t)*(u32 *)arg;
+	}
 
 	for (i = 0; i < nr_irqs; i++)
 		gic_irq_domain_map(domain, virq + i, hwirq + i);
@@ -1009,7 +1015,7 @@ gic_v3_acpi_init(struct acpi_table_header *table)
 	if (err)
 		goto out_redist_unmap;
 
-	irq_set_default_host(gic_data.domain);
+	acpi_irq_domain = gic_data.domain;
 	return 0;
 
 out_redist_unmap:
-- 
1.9.1

      parent reply	other threads:[~2015-06-19  8:46 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-19  8:46 [PATCH v2 0/9] Add self-probe infrastructure and stacked irqdomain support for ACPI based GICv2/3 init Hanjun Guo
2015-06-19  8:46 ` [PATCH v2 1/9] ACPICA: ACPI 6.0: Add changes for MADT table Hanjun Guo
2015-06-19  8:46 ` [PATCH v2 2/9] ACPICA: ACPI 6.0: Add values for MADT GIC version field Hanjun Guo
2015-06-19  8:46 ` [PATCH v2 3/9] irqchip / GIC: Add GIC version support in ACPI MADT Hanjun Guo
2015-06-22 16:45   ` Lorenzo Pieralisi
2015-06-23 11:18     ` Hanjun Guo
2015-06-27  6:07     ` Hanjun Guo
2015-06-19  8:46 ` [PATCH v2 4/9] ACPI / irqchip: Add self-probe infrastructure to initialize IRQ controller Hanjun Guo
2015-06-19  8:46 ` [PATCH v2 5/9] irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code Hanjun Guo
2015-06-19  8:46 ` [PATCH v2 6/9] irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init Hanjun Guo
2015-06-22 17:20   ` Lorenzo Pieralisi
2015-06-23 15:11     ` Hanjun Guo
2015-06-23 17:38       ` Lorenzo Pieralisi
2015-06-27  3:52         ` Hanjun Guo
2015-06-29  8:39           ` Marc Zyngier
2015-06-30 11:50             ` Hanjun Guo
2015-06-30 12:17               ` Marc Zyngier
2015-06-30 15:07                 ` Graeme Gregory
2015-07-03  8:47                   ` Hanjun Guo
2015-07-08  3:40                 ` Hanjun Guo
2015-07-10  9:41                   ` Marc Zyngier
2015-06-19  8:46 ` [PATCH v2 7/9] irqchip / GICv3: Refactor gic_of_init() for GICv3 driver Hanjun Guo
2015-06-19  8:46 ` [PATCH v2 8/9] irqchip / GICv3: Add ACPI support for GICv3+ initialization Hanjun Guo
2015-06-19  8:46 ` Hanjun Guo [this message]

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