From: gabriel.fernandez@linaro.org (Gabriel Fernandez)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/9] drivers: clk: st: Fix FSYN channel values
Date: Tue, 23 Jun 2015 16:09:22 +0200 [thread overview]
Message-ID: <1435068567-30995-5-git-send-email-gabriel.fernandez@linaro.org> (raw)
In-Reply-To: <1435068567-30995-1-git-send-email-gabriel.fernandez@linaro.org>
This patch fixes the value for disabling the FSYN channel clock.
The 'is_enabled' returned value is also fixed.
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
---
drivers/clk/st/clkgen-fsyn.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index e7e6782..9e26099 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -489,7 +489,7 @@ static int quadfs_pll_is_enabled(struct clk_hw *hw)
struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw);
u32 npda = CLKGEN_READ(pll, npda);
- return !!npda;
+ return pll->data->powerup_polarity ? !npda : !!npda;
}
static int clk_fs660c32_vco_get_rate(unsigned long input, struct stm_fs *fs,
@@ -774,7 +774,7 @@ static void quadfs_fsynth_disable(struct clk_hw *hw)
if (fs->lock)
spin_lock_irqsave(fs->lock, flags);
- CLKGEN_WRITE(fs, nsb[fs->chan], !fs->data->standby_polarity);
+ CLKGEN_WRITE(fs, nsb[fs->chan], fs->data->standby_polarity);
if (fs->lock)
spin_unlock_irqrestore(fs->lock, flags);
--
1.9.1
next prev parent reply other threads:[~2015-06-23 14:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-23 14:09 [PATCH 0/9] clk: ST clock fixes Gabriel Fernandez
2015-06-23 14:09 ` [PATCH 1/9] drivers: clk: st: Incorrect clocks status Gabriel Fernandez
2015-06-24 20:02 ` Stephen Boyd
2015-06-25 8:41 ` Gabriel Fernandez
2015-07-06 8:11 ` Gabriel Fernandez
2015-07-06 21:50 ` Stephen Boyd
2015-07-07 0:27 ` Stephen Boyd
2015-06-23 14:09 ` [PATCH 2/9] drivers: clk: st: Incorrect register offset used for lock_status Gabriel Fernandez
2015-06-24 20:03 ` Stephen Boyd
2015-06-23 14:09 ` [PATCH 3/9] drivers: clk: st: Remove unused code Gabriel Fernandez
2015-07-02 16:59 ` Stephen Boyd
2015-06-23 14:09 ` Gabriel Fernandez [this message]
2015-07-02 16:59 ` [PATCH 4/9] drivers: clk: st: Fix FSYN channel values Stephen Boyd
2015-06-23 14:09 ` [PATCH 5/9] drivers: clk: st: Fix flexgen lock init Gabriel Fernandez
2015-07-02 16:59 ` Stephen Boyd
2015-06-23 14:09 ` [PATCH 6/9] drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocks Gabriel Fernandez
2015-07-02 17:00 ` Stephen Boyd
2015-06-23 14:09 ` [PATCH 7/9] drivers: clk: st: Fix mux bit-setting for Cortex A9 clocks Gabriel Fernandez
2015-07-02 17:00 ` Stephen Boyd
2015-06-23 14:09 ` [PATCH 8/9] drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x Gabriel Fernandez
2015-07-02 16:59 ` Stephen Boyd
2015-07-06 8:00 ` Gabriel Fernandez
2015-06-23 14:09 ` [PATCH 9/9] ARM: STi: DT: " Gabriel Fernandez
2015-07-22 9:42 ` Maxime Coquelin
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