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From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/6] irqchip: GIC: Use chip_data instead of handler_data for cascaded interrupts
Date: Thu,  9 Jul 2015 14:19:09 +0100	[thread overview]
Message-ID: <1436447951-22357-5-git-send-email-marc.zyngier@arm.com> (raw)
In-Reply-To: <1436447951-22357-1-git-send-email-marc.zyngier@arm.com>

When used as a primary interrupt controller, the GIC driver uses
irq_data->chip_data to extract controller-specific information.

When used as a secondary interrupt controller, it uses handler_data
instead. As this difference is relatively pointless and only creates
confusion, change the secondary path to match what the rest of the
driver does.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-gic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index e264675..3c7f3a4 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -298,7 +298,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
 
 static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 {
-	struct gic_chip_data *chip_data = irq_get_handler_data(irq);
+	struct gic_chip_data *chip_data = irq_get_chip_data(irq);
 	struct irq_chip *chip = irq_get_chip(irq);
 	unsigned int cascade_irq, gic_irq;
 	unsigned long status;
@@ -341,7 +341,7 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
 {
 	if (gic_nr >= MAX_GIC_NR)
 		BUG();
-	if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0)
+	if (irq_set_chip_data(irq, &gic_data[gic_nr]) != 0)
 		BUG();
 	irq_set_chained_handler(irq, gic_handle_cascade_irq);
 }
-- 
2.1.4

  parent reply	other threads:[~2015-07-09 13:19 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-09 13:19 [PATCH 0/6] irqchip: GICv2/v3: Add support for irq_vcpu_affinity Marc Zyngier
2015-07-09 13:19 ` [PATCH 1/6] irqchip: GICv3: Convert to EOImode == 1 Marc Zyngier
2015-08-11  9:14   ` Eric Auger
2015-08-12 12:38     ` Marc Zyngier
2015-07-09 13:19 ` [PATCH 2/6] irqchip: GIC: " Marc Zyngier
2015-08-11  9:15   ` Eric Auger
2015-08-12 13:31     ` Marc Zyngier
2015-08-12 17:40       ` Catalin Marinas
2015-07-09 13:19 ` [PATCH 3/6] irqchip: GICv3: Skip LPI deactivation Marc Zyngier
2015-08-11  9:42   ` Eric Auger
2015-08-12 13:34     ` Marc Zyngier
2015-08-12 14:28       ` Eric Auger
2015-07-09 13:19 ` Marc Zyngier [this message]
2015-07-09 21:33   ` [PATCH 4/6] irqchip: GIC: Use chip_data instead of handler_data for cascaded interrupts Thomas Gleixner
2015-07-10  7:52     ` Marc Zyngier
2015-07-10  8:17       ` Jiang Liu
2015-07-10  8:21         ` Marc Zyngier
2015-08-11  9:45   ` Eric Auger
2015-08-12 13:41     ` Marc Zyngier
2015-07-09 13:19 ` [PATCH 5/6] irqchip: GICv3: Don't deactivate interrupts forwarded to a guest Marc Zyngier
2015-08-11 10:03   ` Eric Auger
2015-08-12 14:20     ` Marc Zyngier
2015-08-12 15:09       ` Eric Auger
2015-08-12 15:40         ` Marc Zyngier
2015-08-12 15:51           ` Eric Auger
2015-07-09 13:19 ` [PATCH 6/6] irqchip: GIC: " Marc Zyngier
2015-08-11 10:06 ` [PATCH 0/6] irqchip: GICv2/v3: Add support for irq_vcpu_affinity Eric Auger
2015-08-12 14:21   ` Marc Zyngier

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