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From: hanjun.guo@linaro.org (Hanjun Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 7/8] irqchip / GICv3: Add stacked irqdomain support for ACPI based init
Date: Fri, 10 Jul 2015 18:45:13 +0800	[thread overview]
Message-ID: <1436525114-14425-8-git-send-email-hanjun.guo@linaro.org> (raw)
In-Reply-To: <1436525114-14425-1-git-send-email-hanjun.guo@linaro.org>

Similar as stacked domain support for ACPI based GICv2 init, let
acpi_irq_domain point to the core domain of GICv3 and pass the
gsi as the arg to support stacked irqdomain.

Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
---
 drivers/irqchip/irq-gic-v3.c | 24 ++++++++++++++++--------
 1 file changed, 16 insertions(+), 8 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 7b5bde3..91d2f9a 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -734,15 +734,21 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
 static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
 				unsigned int nr_irqs, void *arg)
 {
-	int i, ret;
+	int i;
 	irq_hw_number_t hwirq;
-	unsigned int type = IRQ_TYPE_NONE;
-	struct of_phandle_args *irq_data = arg;
 
-	ret = gic_irq_domain_xlate(domain, irq_data->np, irq_data->args,
-				   irq_data->args_count, &hwirq, &type);
-	if (ret)
-		return ret;
+	if (acpi_disabled) {	/* DT case */
+		int ret;
+		unsigned int type = IRQ_TYPE_NONE;
+		struct of_phandle_args *irq_data = arg;
+
+		ret = gic_irq_domain_xlate(domain, irq_data->np, irq_data->args,
+					   irq_data->args_count, &hwirq, &type);
+		if (ret)
+			return ret;
+	} else {	/* ACPI case */
+		hwirq = (irq_hw_number_t)*(u32 *)arg;
+	}
 
 	for (i = 0; i < nr_irqs; i++)
 		gic_irq_domain_map(domain, virq + i, hwirq + i);
@@ -904,6 +910,7 @@ IRQCHIP_DECLARE(gic_v3, "arm,gic-v3", gic_of_init);
 static struct redist_region *redist_regs __initdata;
 static u32 nr_redist_regions __initdata;
 static phys_addr_t dist_phy_base __initdata;
+static u32 gsi_base __initdata;
 
 static int __init
 gic_acpi_register_redist(u64 phys_base, u64 size)
@@ -961,6 +968,7 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header,
 		return -EINVAL;
 
 	dist_phy_base = dist->base_address;
+	gsi_base = dist->global_irq_base;
 	return 0;
 }
 
@@ -1010,7 +1018,7 @@ gic_acpi_init(struct acpi_table_header *table)
 	if (err)
 		goto out_redist_unmap;
 
-	irq_set_default_host(gic_data.domain);
+	gsi_cfg_data_add(gic_data.domain, gsi_base, gsi_base + gic_data.irq_nr);
 	return 0;
 
 out_redist_unmap:
-- 
1.9.1

  parent reply	other threads:[~2015-07-10 10:45 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-10 10:45 [PATCH v3 0/8] Add self-probe infrastructure and stacked irqdomain support for ACPI based GICv2/3 init Hanjun Guo
2015-07-10 10:45 ` [PATCH v3 1/8] irqchip / GIC: Add GIC version support in ACPI MADT Hanjun Guo
2015-07-10 10:45 ` [PATCH v3 2/8] ACPI / irqchip: Add self-probe infrastructure to initialize IRQ controller Hanjun Guo
2015-07-17 23:15   ` Timur Tabi
2015-07-20  9:32     ` Hanjun Guo
2015-07-20 12:12       ` Timur Tabi
2015-07-20 12:48         ` Hanjun Guo
2015-07-10 10:45 ` [PATCH v3 3/8] irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code Hanjun Guo
2015-07-10 10:45 ` [PATCH v3 4/8] irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init Hanjun Guo
2015-07-20 17:45   ` Marc Zyngier
2015-07-10 10:45 ` [PATCH v3 5/8] irqchip / GICv3: Refactor gic_of_init() for GICv3 driver Hanjun Guo
2015-07-10 10:45 ` [PATCH v3 6/8] irqchip / GICv3: Add ACPI support for GICv3+ initialization Hanjun Guo
2015-07-10 10:45 ` Hanjun Guo [this message]
2015-07-10 10:45 ` [PATCH v3 8/8] irqchip / gicv3 / ACPI: Add GICR support via GICC structures Hanjun Guo
2015-07-17 23:09 ` [Linaro-acpi] [PATCH v3 0/8] Add self-probe infrastructure and stacked irqdomain support for ACPI based GICv2/3 init Timur Tabi
2015-07-20  9:06   ` Hanjun Guo
2015-07-20 12:06     ` Timur Tabi

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