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From: james.morse@arm.com (James Morse)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/6] arm64: kernel: Add min_field_value and use '>=' for feature detection
Date: Tue, 21 Jul 2015 13:23:29 +0100	[thread overview]
Message-ID: <1437481411-1595-5-git-send-email-james.morse@arm.com> (raw)
In-Reply-To: <1437481411-1595-1-git-send-email-james.morse@arm.com>

When a new cpu feature is available, the cpu feature bits will have some
initial value, which is incremented when the feature is updated.
This patch changes 'register_value' to be 'min_field_value', and checks
the feature bits value (interpreted as a signed int) is greater than this
minimum.

Signed-off-by: James Morse <james.morse@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/cpufeature.h |  4 ++--
 arch/arm64/kernel/cpufeature.c      | 14 +++++++++++---
 2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 484fa9425314..f595f7ddd43b 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -42,8 +42,8 @@ struct arm64_cpu_capabilities {
 		};
 
 		struct {	/* Feature register checking */
-			u64 register_mask;
-			u64 register_value;
+			int field_pos;
+			int min_field_value;
 		};
 	};
 };
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 650ffc28bedc..74fd0f74b065 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -23,12 +23,20 @@
 #include <asm/cpufeature.h>
 
 static bool
+feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
+{
+	int val = cpuid_feature_extract_field(reg, entry->field_pos);
+
+	return val >= entry->min_field_value;
+}
+
+static bool
 has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry)
 {
 	u64 val;
 
 	val = read_cpuid(id_aa64pfr0_el1);
-	return (val & entry->register_mask) == entry->register_value;
+	return feature_matches(val, entry);
 }
 
 static const struct arm64_cpu_capabilities arm64_features[] = {
@@ -36,8 +44,8 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
 		.desc = "GIC system register CPU interface",
 		.capability = ARM64_HAS_SYSREG_GIC_CPUIF,
 		.matches = has_id_aa64pfr0_feature,
-		.register_mask = (0xf << 24),
-		.register_value = (1 << 24),
+		.field_pos = 24,
+		.min_field_value = 1,
 	},
 	{},
 };
-- 
2.1.4

  parent reply	other threads:[~2015-07-21 12:23 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-21 12:23 [PATCH v3 0/6] arm64: kernel: Add support for Privileged Access Never James Morse
2015-07-21 12:23 ` [PATCH v3 1/6] arm64: kernel: Add cpuid_feature_extract_field() for 4bit sign extension James Morse
2015-07-21 12:32   ` Catalin Marinas
2015-07-21 12:23 ` [PATCH v3 2/6] arm64: kernel: preparatory: Move config_sctlr_el1 James Morse
2015-07-21 12:23 ` [PATCH v3 3/6] arm64: kernel: Add cpufeature 'enable' callback James Morse
2015-07-21 12:23 ` James Morse [this message]
2015-07-21 12:33   ` [PATCH v3 4/6] arm64: kernel: Add min_field_value and use '>=' for feature detection Catalin Marinas
2015-07-21 12:23 ` [PATCH v3 5/6] arm64: kernel: Add optional CONFIG_ parameter to ALTERNATIVE() James Morse
2015-07-21 12:23 ` [PATCH v3 6/6] arm64: kernel: Add support for Privileged Access Never James Morse
2015-07-21 12:38   ` Catalin Marinas
2015-07-22 17:01     ` Will Deacon
2015-07-22 18:04       ` James Morse
2015-07-22 18:14         ` Will Deacon
2015-07-23  7:58           ` James Morse
2015-07-22 18:05       ` [PATCH v4] " James Morse
2015-07-23 13:07         ` Will Deacon
2015-07-24 15:14           ` James Morse
2015-07-24 16:56             ` Will Deacon
2015-07-23 12:00     ` [PATCH v3 6/6] " Will Deacon

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