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From: rric@kernel.org (Robert Richter)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 0/5] irqchip, gicv3: Updates and Cavium ThunderX errata workarounds
Date: Fri, 14 Aug 2015 20:28:00 +0200	[thread overview]
Message-ID: <1439576885-15621-1-git-send-email-rric@kernel.org> (raw)

From: Robert Richter <rrichter@cavium.com>

This patch series adds gicv3 updates and workarounds for HW errata in
Cavium's ThunderX GICV3.

The first one is an unchanged resubmission of a patch from a gicv3
series I sent a while ago.

The next patches implement the workarounds for ThunderX's gicv3. Patch
#2 implements the cpu workaround for gicv3 on ThunderX. Patch #3 is a
prerequisit for patch #5. Patch #4 adds generic code to parse the hw
revision provided by an IIDR. This patch is used for the implementa-
tion of the actual gicv3-its workaround in #5.

All current review comments addressed so far with v4.

v4:
 * simplify code to only use cpus_have_cap() in gicv3_enable_quirks()
 * only enable hw detection for its in its_enable_quirks()
 * removed gicv3_check_capabilities()
 * drop special cpu capability for zero

v3:
 * use arm64 errata framework for midr check
 * fix mixup of errata to be dependend from midr/iidr

v2:
 * Workaround for 23154:
   * implement code in a single asm() to keep instruction sequence
   * added comment to the code that explains the erratum
   * apply workaround also if running as guest, thus check MIDR
 * adding MIDR check

Robert Richter (5):
  irqchip, gicv3-its: Add range check for number of allocated pages
  irqchip, gicv3: Workaround for Cavium ThunderX erratum 23154
  irqchip, gicv3-its: Read typer register outside the loop
  irqchip, gicv3-its: Add HW revision detection and configuration
  irqchip, gicv3-its: Workaround for Cavium ThunderX errata 22375, 24313

 arch/arm64/Kconfig                  | 11 +++++++
 arch/arm64/include/asm/cpufeature.h |  3 +-
 arch/arm64/include/asm/cputype.h    | 18 ++++++-----
 arch/arm64/kernel/cpu_errata.c      |  9 ++++++
 drivers/irqchip/irq-gic-common.c    | 11 +++++++
 drivers/irqchip/irq-gic-common.h    |  9 ++++++
 drivers/irqchip/irq-gic-v3-its.c    | 62 +++++++++++++++++++++++++++++++++----
 drivers/irqchip/irq-gic-v3.c        | 42 ++++++++++++++++++++++++-
 include/linux/irqchip/arm-gic-v3.h  |  1 +
 9 files changed, 151 insertions(+), 15 deletions(-)

-- 
2.1.1

             reply	other threads:[~2015-08-14 18:28 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-14 18:28 Robert Richter [this message]
2015-08-14 18:28 ` [PATCH v4 1/5] irqchip, gicv3-its: Add range check for number of allocated pages Robert Richter
2015-08-14 18:28 ` [PATCH v4 2/5] irqchip, gicv3: Workaround for Cavium ThunderX erratum 23154 Robert Richter
2015-08-17 16:40   ` Catalin Marinas
2015-08-19 15:43     ` Robert Richter
2015-08-17 17:00   ` David Daney
2015-08-19 16:05     ` Robert Richter
2015-09-07 16:54   ` Suzuki K. Poulose
2015-09-07 17:09     ` Marc Zyngier
2015-09-07 17:32       ` Robert Richter
2015-09-07 17:15     ` Catalin Marinas
2015-09-07 17:41       ` Suzuki K. Poulose
2015-09-08  9:00         ` Catalin Marinas
2015-09-08  9:09           ` Suzuki K. Poulose
2015-09-08  9:37             ` Catalin Marinas
2015-09-08 10:30               ` Suzuki K. Poulose
2015-08-14 18:28 ` [PATCH v4 3/5] irqchip, gicv3-its: Read typer register outside the loop Robert Richter
2015-08-14 18:28 ` [PATCH v4 4/5] irqchip, gicv3-its: Add HW revision detection and configuration Robert Richter
2015-09-07 16:26   ` Marc Zyngier
2015-08-14 18:28 ` [PATCH v4 5/5] irqchip, gicv3-its: Workaround for Cavium ThunderX errata 22375, 24313 Robert Richter
2015-09-07 16:32   ` Marc Zyngier
2015-09-18  8:33     ` Robert Richter
2015-09-07 16:35 ` [PATCH v4 0/5] irqchip, gicv3: Updates and Cavium ThunderX errata workarounds Marc Zyngier

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