* [PATCH 0/2] ST PLL fixes for 4.3
@ 2015-08-19 8:48 Gabriel Fernandez
2015-08-19 8:48 ` [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation Gabriel Fernandez
2015-08-19 8:48 ` [PATCH 2/2] drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x Gabriel Fernandez
0 siblings, 2 replies; 5+ messages in thread
From: Gabriel Fernandez @ 2015-08-19 8:48 UTC (permalink / raw)
To: linux-arm-kernel
Should be apply with
commit 5eb26c605909 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x")
to avoid broken compatibility.
Gabriel Fernandez (2):
dt-bindings: Fix tipo in st,clkgen-pll documentation
drivers: clk: st: Rename st_pll3200c32_407_c0_x into
st_pll3200c32_cx_x
Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt | 4 ++--
drivers/clk/st/clkgen-fsyn.c | 8 ++++----
drivers/clk/st/clkgen-pll.c | 12 ++++++------
3 files changed, 12 insertions(+), 12 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation
2015-08-19 8:48 [PATCH 0/2] ST PLL fixes for 4.3 Gabriel Fernandez
@ 2015-08-19 8:48 ` Gabriel Fernandez
2015-08-19 8:48 ` [PATCH 2/2] drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x Gabriel Fernandez
1 sibling, 0 replies; 5+ messages in thread
From: Gabriel Fernandez @ 2015-08-19 8:48 UTC (permalink / raw)
To: linux-arm-kernel
replace "sst,plls-c32-cx_x" by "st,plls-c32-cx_x"
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
---
Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
index d8b168e..e2c6db0 100644
--- a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
+++ b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
@@ -21,8 +21,8 @@ Required properties:
"st,stih416-plls-c32-ddr", "st,clkgen-plls-c32"
"st,stih407-plls-c32-a0", "st,clkgen-plls-c32"
"st,stih407-plls-c32-a9", "st,clkgen-plls-c32"
- "sst,plls-c32-cx_0", "st,clkgen-plls-c32"
- "sst,plls-c32-cx_1", "st,clkgen-plls-c32"
+ "st,plls-c32-cx_0", "st,clkgen-plls-c32"
+ "st,plls-c32-cx_1", "st,clkgen-plls-c32"
"st,stih415-gpu-pll-c32", "st,clkgengpu-pll-c32"
"st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32"
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x
2015-08-19 8:48 [PATCH 0/2] ST PLL fixes for 4.3 Gabriel Fernandez
2015-08-19 8:48 ` [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation Gabriel Fernandez
@ 2015-08-19 8:48 ` Gabriel Fernandez
1 sibling, 0 replies; 5+ messages in thread
From: Gabriel Fernandez @ 2015-08-19 8:48 UTC (permalink / raw)
To: linux-arm-kernel
Use a generic name for this kind of PLL
Correction in dts files are already done here:
commit 5eb26c605909 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
---
drivers/clk/st/clkgen-fsyn.c | 8 ++++----
drivers/clk/st/clkgen-pll.c | 12 ++++++------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index 83ccf14..576cd03 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -307,7 +307,7 @@ static const struct clkgen_quadfs_data st_fs660c32_F_416 = {
.get_rate = clk_fs660c32_dig_get_rate,
};
-static const struct clkgen_quadfs_data st_fs660c32_C_407 = {
+static const struct clkgen_quadfs_data st_fs660c32_C = {
.nrst_present = true,
.nrst = { CLKGEN_FIELD(0x2f0, 0x1, 0),
CLKGEN_FIELD(0x2f0, 0x1, 1),
@@ -350,7 +350,7 @@ static const struct clkgen_quadfs_data st_fs660c32_C_407 = {
.get_rate = clk_fs660c32_dig_get_rate,
};
-static const struct clkgen_quadfs_data st_fs660c32_D_407 = {
+static const struct clkgen_quadfs_data st_fs660c32_D = {
.nrst_present = true,
.nrst = { CLKGEN_FIELD(0x2a0, 0x1, 0),
CLKGEN_FIELD(0x2a0, 0x1, 1),
@@ -1077,11 +1077,11 @@ static const struct of_device_id quadfs_of_match[] = {
},
{
.compatible = "st,stih407-quadfs660-C",
- .data = &st_fs660c32_C_407
+ .data = &st_fs660c32_C
},
{
.compatible = "st,stih407-quadfs660-D",
- .data = &st_fs660c32_D_407
+ .data = &st_fs660c32_D
},
{}
};
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 47a38a9..b2a332c 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -193,7 +193,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_a0 = {
.ops = &stm_pll3200c32_ops,
};
-static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = {
+static const struct clkgen_pll_data st_pll3200c32_cx_0 = {
/* 407 C0 PLL0 */
.pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8),
.locked_status = CLKGEN_FIELD(0x2a0, 0x1, 24),
@@ -205,7 +205,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = {
.ops = &stm_pll3200c32_ops,
};
-static const struct clkgen_pll_data st_pll3200c32_407_c0_1 = {
+static const struct clkgen_pll_data st_pll3200c32_cx_1 = {
/* 407 C0 PLL1 */
.pdn_status = CLKGEN_FIELD(0x2c8, 0x1, 8),
.locked_status = CLKGEN_FIELD(0x2c8, 0x1, 24),
@@ -624,12 +624,12 @@ static const struct of_device_id c32_pll_of_match[] = {
.data = &st_pll3200c32_407_a0,
},
{
- .compatible = "st,stih407-plls-c32-c0_0",
- .data = &st_pll3200c32_407_c0_0,
+ .compatible = "st,plls-c32-cx_0",
+ .data = &st_pll3200c32_cx_0,
},
{
- .compatible = "st,stih407-plls-c32-c0_1",
- .data = &st_pll3200c32_407_c0_1,
+ .compatible = "st,plls-c32-cx_1",
+ .data = &st_pll3200c32_cx_1,
},
{
.compatible = "st,stih407-plls-c32-a9",
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation
2015-09-16 7:42 [RESEND PATCH 0/2] ST PLL fixes for 4.3-rc2 Gabriel Fernandez
@ 2015-09-16 7:42 ` Gabriel Fernandez
2015-09-21 15:04 ` Rob Herring
0 siblings, 1 reply; 5+ messages in thread
From: Gabriel Fernandez @ 2015-09-16 7:42 UTC (permalink / raw)
To: linux-arm-kernel
replace "sst,plls-c32-cx_x" by "st,plls-c32-cx_x"
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
---
Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
index d8b168e..e2c6db0 100644
--- a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
+++ b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
@@ -21,8 +21,8 @@ Required properties:
"st,stih416-plls-c32-ddr", "st,clkgen-plls-c32"
"st,stih407-plls-c32-a0", "st,clkgen-plls-c32"
"st,stih407-plls-c32-a9", "st,clkgen-plls-c32"
- "sst,plls-c32-cx_0", "st,clkgen-plls-c32"
- "sst,plls-c32-cx_1", "st,clkgen-plls-c32"
+ "st,plls-c32-cx_0", "st,clkgen-plls-c32"
+ "st,plls-c32-cx_1", "st,clkgen-plls-c32"
"st,stih415-gpu-pll-c32", "st,clkgengpu-pll-c32"
"st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32"
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation
2015-09-16 7:42 ` [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation Gabriel Fernandez
@ 2015-09-21 15:04 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2015-09-21 15:04 UTC (permalink / raw)
To: linux-arm-kernel
On 09/16/2015 02:42 AM, Gabriel Fernandez wrote:
> replace "sst,plls-c32-cx_x" by "st,plls-c32-cx_x"
Ironically, the subject has a typo...
Acked-by: Rob Herring <robh@kernel.org>
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
> ---
> Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
> index d8b168e..e2c6db0 100644
> --- a/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
> +++ b/Documentation/devicetree/bindings/clock/st/st,clkgen-pll.txt
> @@ -21,8 +21,8 @@ Required properties:
> "st,stih416-plls-c32-ddr", "st,clkgen-plls-c32"
> "st,stih407-plls-c32-a0", "st,clkgen-plls-c32"
> "st,stih407-plls-c32-a9", "st,clkgen-plls-c32"
> - "sst,plls-c32-cx_0", "st,clkgen-plls-c32"
> - "sst,plls-c32-cx_1", "st,clkgen-plls-c32"
> + "st,plls-c32-cx_0", "st,clkgen-plls-c32"
> + "st,plls-c32-cx_1", "st,clkgen-plls-c32"
>
> "st,stih415-gpu-pll-c32", "st,clkgengpu-pll-c32"
> "st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32"
>
^ permalink raw reply [flat|nested] 5+ messages in thread
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Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2015-08-19 8:48 [PATCH 0/2] ST PLL fixes for 4.3 Gabriel Fernandez
2015-08-19 8:48 ` [PATCH 1/2] dt-bindings: Fix tipo in st,clkgen-pll documentation Gabriel Fernandez
2015-08-19 8:48 ` [PATCH 2/2] drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x Gabriel Fernandez
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2015-09-16 7:42 [RESEND PATCH 0/2] ST PLL fixes for 4.3-rc2 Gabriel Fernandez
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2015-09-21 15:04 ` Rob Herring
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