[PATCH 7/8] clk: imx6: retain early UART clocks during kernel init

[l.stach@pengutronix.de (Lucas Stach)]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx6q.c  | 12 ++++++++++++
 drivers/clk/imx/clk-imx6sl.c | 12 ++++++++++++
 drivers/clk/imx/clk-imx6sx.c | 12 ++++++++++++
 3 files changed, 36 insertions(+)

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index d046f8e43de8..af6a6517b26c 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -130,6 +130,12 @@ static inline int clk_on_imx6dl(void)
 	return of_machine_is_compatible("fsl,imx6dl");
 }
 
+static void __init imx6q_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clk[IMX6QDL_CLK_UART_IPG]);
+	clk_disable_unprepare(clk[IMX6QDL_CLK_UART_SERIAL]);
+}
+
 static void __init imx6q_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -534,5 +540,11 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	/* All existing boards with PCIe use LVDS1 */
 	if (IS_ENABLED(CONFIG_PCI_IMX6))
 		clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
+
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clk[IMX6QDL_CLK_UART_IPG]);
+		clk_prepare_enable(clk[IMX6QDL_CLK_UART_SERIAL]);
+		imx_clk_set_uart_disable_callback(imx6q_uart_disable_cb);
+	}
 }
 CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index a0d4cf26cfa9..737a9a84f201 100644
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -184,6 +184,12 @@ void imx6sl_set_wait_clk(bool enter)
 		imx6sl_enable_pll_arm(false);
 }
 
+static void __init imx6sl_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clks[IMX6SL_CLK_UART]);
+	clk_disable_unprepare(clks[IMX6SL_CLK_UART_SERIAL]);
+}
+
 static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -439,5 +445,11 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 
 	clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
 		       clks[IMX6SL_CLK_PLL2_PFD2]);
+
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clks[IMX6SL_CLK_UART]);
+		clk_prepare_enable(clks[IMX6SL_CLK_UART_SERIAL]);
+		imx_clk_set_uart_disable_callback(imx6sl_uart_disable_cb);
+	}
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index 5b95c2c2bf52..ec14235659cc 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -135,6 +135,12 @@ static u32 share_count_ssi1;
 static u32 share_count_ssi2;
 static u32 share_count_ssi3;
 
+static void __init imx6sx_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clks[IMX6SX_CLK_UART_IPG]);
+	clk_disable_unprepare(clks[IMX6SX_CLK_UART_SERIAL]);
+}
+
 static void __init imx6sx_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -557,5 +563,11 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
 
 	clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
 	clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
+
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clks[IMX6SX_CLK_UART_IPG]);
+		clk_prepare_enable(clks[IMX6SX_CLK_UART_SERIAL]);
+		imx_clk_set_uart_disable_callback(imx6sx_uart_disable_cb);
+	}
 }
 CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);
-- 
2.5.0