[PATCH 0/8] i.MX early debug UART clock fixes

[PATCH 0/8] i.MX early debug UART clock fixes

[Lucas Stach]

This series fixes a long standing interaction issue between the
kernels early debug facilities and the i.MX clock drivers.

Both earlyprintk and earlycon rely on the bootloader setup clocks
for the UARTs to be retained during kernel init. As those clocks are
only enabled in hardware, but not referenced in software they (or even
their parent clocks) may get disabled as a result of other clocks being
en-/disabled during boot.

This results in missing messages from the early debug console until the
regular system console takes over, or even worse system hangs in response
to unclocked register accesses. This renders those debugging facilities a
lot less useful.

The fix implemented here is to check if any of this early debugging is
enabled and keep the UART clocks referenced and enabled in that case.
The clocks will then only be disabled at the end of kernel init, at which
point the real console should have taken over and the early outputs being
disabled.

I've runtime tested this on i.MX6Q and i.MX53, other platforms are only
compile tested. This is mostly a mechanical change, but still I would
appreciate some testing.

Regards,
Lucas

Lucas Stach (8):
  clk: imx: add common logic to detect early UART usage
  clk: imx25: retain early UART clocks during kernel init
  clk: imx27: retain early UART clocks during kernel init
  clk: imx31: retain early UART clocks during kernel init
  clk: imx35: retain early UART clocks during kernel init
  clk: imx5: retain early UART clocks during kernel init
  clk: imx6: retain early UART clocks during kernel init
  clk: imx7d: retain early UART clocks during kernel init

 drivers/clk/imx/clk-imx25.c       | 20 ++++++++++++++++++++
 drivers/clk/imx/clk-imx27.c       | 22 ++++++++++++++++++++++
 drivers/clk/imx/clk-imx31.c       | 20 ++++++++++++++++++++
 drivers/clk/imx/clk-imx35.c       | 16 ++++++++++++++++
 drivers/clk/imx/clk-imx51-imx53.c | 28 ++++++++++++++++++++++++++++
 drivers/clk/imx/clk-imx6q.c       | 12 ++++++++++++
 drivers/clk/imx/clk-imx6sl.c      | 12 ++++++++++++
 drivers/clk/imx/clk-imx6sx.c      | 12 ++++++++++++
 drivers/clk/imx/clk-imx7d.c       | 22 ++++++++++++++++++++++
 drivers/clk/imx/clk.c             | 33 +++++++++++++++++++++++++++++++++
 drivers/clk/imx/clk.h             |  2 ++
 11 files changed, 199 insertions(+)

-- 
2.5.0

[PATCH 1/8] clk: imx: add common logic to detect early UART usage

[Lucas Stach]

Both earlycon and eralyprintk depend on the bootloader setup UART
clocks being retained. This patch adds the common logic to detect such
situations and make the information available to the clock drivers, as
well as adding the facilities to disable those clocks at the end of
the kernel init.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk.c | 33 +++++++++++++++++++++++++++++++++
 drivers/clk/imx/clk.h |  2 ++
 2 files changed, 35 insertions(+)

diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
index df12b5307175..70580c8d1a3c 100644
--- a/drivers/clk/imx/clk.c
+++ b/drivers/clk/imx/clk.c
@@ -73,3 +73,36 @@ void imx_cscmr1_fixup(u32 *val)
 	*val ^= CSCMR1_FIXUP;
 	return;
 }
+
+static int __initdata imx_keep_uart_clocks;
+static void __initdata (*imx_uart_disable_fn)(void);
+
+static int __init imx_keep_uart_clocks_param(char *str)
+{
+	imx_keep_uart_clocks = 1;
+
+	return 0;
+}
+__setup_param("earlycon", imx_keep_uart_earlycon,
+	      imx_keep_uart_clocks_param, 0);
+__setup_param("earlyprintk", imx_keep_uart_earlyprintk,
+	      imx_keep_uart_clocks_param, 0);
+
+int __init imx_clk_keep_uart(void)
+{
+	return imx_keep_uart_clocks;
+}
+
+void __init imx_clk_set_uart_disable_callback(void (*disable_cb)(void))
+{
+	imx_uart_disable_fn = disable_cb;
+}
+
+static int __init imx_clk_disable_uart(void)
+{
+	if (imx_uart_disable_fn)
+		imx_uart_disable_fn();
+
+	return 0;
+}
+late_initcall_sync(imx_clk_disable_uart);
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 1049b0c7d818..41725a92c63c 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -7,6 +7,8 @@
 extern spinlock_t imx_ccm_lock;
 
 void imx_check_clocks(struct clk *clks[], unsigned int count);
+int imx_clk_keep_uart(void);
+void imx_clk_set_uart_disable_callback(void (*disable_cb)(void));
 
 extern void imx_cscmr1_fixup(u32 *val);
 
-- 
2.5.0

[PATCH 2/8] clk: imx25: retain early UART clocks during kernel init

[Lucas Stach]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx25.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
index ec1a4c1dacf1..4322ef409cc6 100644
--- a/drivers/clk/imx/clk-imx25.c
+++ b/drivers/clk/imx/clk-imx25.c
@@ -86,6 +86,16 @@ enum mx25_clks {
 
 static struct clk *clk[clk_max];
 
+static void __init imx25_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clk[uart_ipg_per]);
+	clk_disable_unprepare(clk[uart1_ipg]);
+	clk_disable_unprepare(clk[uart2_ipg]);
+	clk_disable_unprepare(clk[uart3_ipg]);
+	clk_disable_unprepare(clk[uart4_ipg]);
+	clk_disable_unprepare(clk[uart5_ipg]);
+}
+
 static int __init __mx25_clocks_init(unsigned long osc_rate,
 				     void __iomem *ccm_base)
 {
@@ -233,6 +243,16 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
 	 */
 	clk_set_parent(clk[cko_sel], clk[ipg]);
 
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clk[uart_ipg_per]);
+		clk_prepare_enable(clk[uart1_ipg]);
+		clk_prepare_enable(clk[uart2_ipg]);
+		clk_prepare_enable(clk[uart3_ipg]);
+		clk_prepare_enable(clk[uart4_ipg]);
+		clk_prepare_enable(clk[uart5_ipg]);
+		imx_clk_set_uart_disable_callback(imx25_uart_disable_cb);
+	}
+
 	return 0;
 }
 
-- 
2.5.0

[PATCH 3/8] clk: imx27: retain early UART clocks during kernel init

[Lucas Stach]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx27.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c
index d9d50d54ef2a..54fb783123a9 100644
--- a/drivers/clk/imx/clk-imx27.c
+++ b/drivers/clk/imx/clk-imx27.c
@@ -47,6 +47,17 @@ static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
 static struct clk *clk[IMX27_CLK_MAX];
 static struct clk_onecell_data clk_data;
 
+static void __init imx27_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clk[IMX27_CLK_PER1_GATE]);
+	clk_disable_unprepare(clk[IMX27_CLK_UART1_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX27_CLK_UART2_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX27_CLK_UART3_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX27_CLK_UART4_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX27_CLK_UART5_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX27_CLK_UART6_IPG_GATE]);
+}
+
 static void __init _mx27_clocks_init(unsigned long fref)
 {
 	BUG_ON(!ccm);
@@ -163,6 +174,17 @@ static void __init _mx27_clocks_init(unsigned long fref)
 
 	clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
 
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clk[IMX27_CLK_PER1_GATE]);
+		clk_prepare_enable(clk[IMX27_CLK_UART1_IPG_GATE]);
+		clk_prepare_enable(clk[IMX27_CLK_UART2_IPG_GATE]);
+		clk_prepare_enable(clk[IMX27_CLK_UART3_IPG_GATE]);
+		clk_prepare_enable(clk[IMX27_CLK_UART4_IPG_GATE]);
+		clk_prepare_enable(clk[IMX27_CLK_UART5_IPG_GATE]);
+		clk_prepare_enable(clk[IMX27_CLK_UART6_IPG_GATE]);
+		imx_clk_set_uart_disable_callback(imx27_uart_disable_cb);
+	}
+
 	imx_print_silicon_rev("i.MX27", mx27_revision());
 }
 
-- 
2.5.0

[PATCH 4/8] clk: imx31: retain early UART clocks during kernel init

[Lucas Stach]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx31.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c
index fe66c40b7be2..c8da3b31f24d 100644
--- a/drivers/clk/imx/clk-imx31.c
+++ b/drivers/clk/imx/clk-imx31.c
@@ -62,6 +62,16 @@ enum mx31_clks {
 static struct clk *clk[clk_max];
 static struct clk_onecell_data clk_data;
 
+static void __init imx31_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clk[ipg]);
+	clk_disable_unprepare(clk[uart1_gate]);
+	clk_disable_unprepare(clk[uart2_gate]);
+	clk_disable_unprepare(clk[uart3_gate]);
+	clk_disable_unprepare(clk[uart4_gate]);
+	clk_disable_unprepare(clk[uart5_gate]);
+}
+
 int __init mx31_clocks_init(unsigned long fref)
 {
 	void __iomem *base;
@@ -199,6 +209,16 @@ int __init mx31_clocks_init(unsigned long fref)
 	mx31_revision();
 	clk_disable_unprepare(clk[iim_gate]);
 
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clk[ipg]);
+		clk_prepare_enable(clk[uart1_gate]);
+		clk_prepare_enable(clk[uart2_gate]);
+		clk_prepare_enable(clk[uart3_gate]);
+		clk_prepare_enable(clk[uart4_gate]);
+		clk_prepare_enable(clk[uart5_gate]);
+		imx_clk_set_uart_disable_callback(imx31_uart_disable_cb);
+	}
+
 	mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, GPT_TYPE_IMX31);
 
 	return 0;
-- 
2.5.0

[PATCH 5/8] clk: imx35: retain early UART clocks during kernel init

[Lucas Stach]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx35.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/clk/imx/clk-imx35.c b/drivers/clk/imx/clk-imx35.c
index 69138ba3dec7..7b2aaf123d3b 100644
--- a/drivers/clk/imx/clk-imx35.c
+++ b/drivers/clk/imx/clk-imx35.c
@@ -84,6 +84,14 @@ enum mx35_clks {
 
 static struct clk *clk[clk_max];
 
+static void __init imx35_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clk[ipg]);
+	clk_disable_unprepare(clk[uart1_gate]);
+	clk_disable_unprepare(clk[uart2_gate]);
+	clk_disable_unprepare(clk[uart3_gate]);
+}
+
 int __init mx35_clocks_init(void)
 {
 	void __iomem *base;
@@ -292,6 +300,14 @@ int __init mx35_clocks_init(void)
 	 */
 	clk_prepare_enable(clk[scc_gate]);
 
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clk[ipg]);
+		clk_prepare_enable(clk[uart1_gate]);
+		clk_prepare_enable(clk[uart2_gate]);
+		clk_prepare_enable(clk[uart3_gate]);
+		imx_clk_set_uart_disable_callback(imx35_uart_disable_cb);
+	}
+
 	imx_print_silicon_rev("i.MX35", mx35_revision());
 
 	mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT, GPT_TYPE_IMX31);
-- 
2.5.0

[PATCH 6/8] clk: imx5: retain early UART clocks during kernel init

[Lucas Stach]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx51-imx53.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c
index a7e4f394be0d..701d1d912a4b 100644
--- a/drivers/clk/imx/clk-imx51-imx53.c
+++ b/drivers/clk/imx/clk-imx51-imx53.c
@@ -130,6 +130,20 @@ static const char *cpu_podf_sels[] = { "pll1_sw", "step_sel" };
 static struct clk *clk[IMX5_CLK_END];
 static struct clk_onecell_data clk_data;
 
+static void __init imx5_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clk[IMX5_CLK_UART1_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART1_PER_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART2_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART2_PER_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART3_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART3_PER_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART4_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART4_PER_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART5_IPG_GATE]);
+	clk_disable_unprepare(clk[IMX5_CLK_UART5_PER_GATE]);
+}
+
 static void __init mx5_clocks_common_init(void __iomem *ccm_base)
 {
 	clk[IMX5_CLK_DUMMY]		= imx_clk_fixed("dummy", 0);
@@ -310,6 +324,20 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base)
 	clk_prepare_enable(clk[IMX5_CLK_TMAX1]);
 	clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
 	clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
+
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clk[IMX5_CLK_UART1_IPG_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART1_PER_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART2_IPG_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART2_PER_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART3_IPG_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART3_PER_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART4_IPG_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART4_PER_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART5_IPG_GATE]);
+		clk_prepare_enable(clk[IMX5_CLK_UART5_PER_GATE]);
+		imx_clk_set_uart_disable_callback(imx5_uart_disable_cb);
+	}
 }
 
 static void __init mx50_clocks_init(struct device_node *np)
-- 
2.5.0

[PATCH 7/8] clk: imx6: retain early UART clocks during kernel init

[Lucas Stach]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx6q.c  | 12 ++++++++++++
 drivers/clk/imx/clk-imx6sl.c | 12 ++++++++++++
 drivers/clk/imx/clk-imx6sx.c | 12 ++++++++++++
 3 files changed, 36 insertions(+)

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index d046f8e43de8..af6a6517b26c 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -130,6 +130,12 @@ static inline int clk_on_imx6dl(void)
 	return of_machine_is_compatible("fsl,imx6dl");
 }
 
+static void __init imx6q_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clk[IMX6QDL_CLK_UART_IPG]);
+	clk_disable_unprepare(clk[IMX6QDL_CLK_UART_SERIAL]);
+}
+
 static void __init imx6q_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -534,5 +540,11 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	/* All existing boards with PCIe use LVDS1 */
 	if (IS_ENABLED(CONFIG_PCI_IMX6))
 		clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
+
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clk[IMX6QDL_CLK_UART_IPG]);
+		clk_prepare_enable(clk[IMX6QDL_CLK_UART_SERIAL]);
+		imx_clk_set_uart_disable_callback(imx6q_uart_disable_cb);
+	}
 }
 CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index a0d4cf26cfa9..737a9a84f201 100644
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -184,6 +184,12 @@ void imx6sl_set_wait_clk(bool enter)
 		imx6sl_enable_pll_arm(false);
 }
 
+static void __init imx6sl_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clks[IMX6SL_CLK_UART]);
+	clk_disable_unprepare(clks[IMX6SL_CLK_UART_SERIAL]);
+}
+
 static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -439,5 +445,11 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 
 	clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
 		       clks[IMX6SL_CLK_PLL2_PFD2]);
+
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clks[IMX6SL_CLK_UART]);
+		clk_prepare_enable(clks[IMX6SL_CLK_UART_SERIAL]);
+		imx_clk_set_uart_disable_callback(imx6sl_uart_disable_cb);
+	}
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index 5b95c2c2bf52..ec14235659cc 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -135,6 +135,12 @@ static u32 share_count_ssi1;
 static u32 share_count_ssi2;
 static u32 share_count_ssi3;
 
+static void __init imx6sx_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clks[IMX6SX_CLK_UART_IPG]);
+	clk_disable_unprepare(clks[IMX6SX_CLK_UART_SERIAL]);
+}
+
 static void __init imx6sx_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -557,5 +563,11 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
 
 	clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
 	clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
+
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clks[IMX6SX_CLK_UART_IPG]);
+		clk_prepare_enable(clks[IMX6SX_CLK_UART_SERIAL]);
+		imx_clk_set_uart_disable_callback(imx6sx_uart_disable_cb);
+	}
 }
 CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);
-- 
2.5.0

[PATCH 8/8] clk: imx7d: retain early UART clocks during kernel init

[Lucas Stach]

Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/clk/imx/clk-imx7d.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index 71f3a94b472c..8daef5202841 100644
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -363,6 +363,17 @@ static const char *pll_video_bypass_sel[] = { "pll_video_main", "pll_video_main_
 
 static struct clk_onecell_data clk_data;
 
+static void __init imx7d_uart_disable_cb(void)
+{
+	clk_disable_unprepare(clks[IMX7D_UART1_ROOT_CLK]);
+	clk_disable_unprepare(clks[IMX7D_UART2_ROOT_CLK]);
+	clk_disable_unprepare(clks[IMX7D_UART3_ROOT_CLK]);
+	clk_disable_unprepare(clks[IMX7D_UART4_ROOT_CLK]);
+	clk_disable_unprepare(clks[IMX7D_UART5_ROOT_CLK]);
+	clk_disable_unprepare(clks[IMX7D_UART6_ROOT_CLK]);
+	clk_disable_unprepare(clks[IMX7D_UART7_ROOT_CLK]);
+}
+
 static void __init imx7d_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -856,5 +867,16 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
 	/* set uart module clock's parent clock source that must be great then 80MHz */
 	clk_set_parent(clks[IMX7D_UART1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]);
 
+	if (imx_clk_keep_uart()) {
+		clk_prepare_enable(clks[IMX7D_UART1_ROOT_CLK]);
+		clk_prepare_enable(clks[IMX7D_UART2_ROOT_CLK]);
+		clk_prepare_enable(clks[IMX7D_UART3_ROOT_CLK]);
+		clk_prepare_enable(clks[IMX7D_UART4_ROOT_CLK]);
+		clk_prepare_enable(clks[IMX7D_UART5_ROOT_CLK]);
+		clk_prepare_enable(clks[IMX7D_UART6_ROOT_CLK]);
+		clk_prepare_enable(clks[IMX7D_UART7_ROOT_CLK]);
+		imx_clk_set_uart_disable_callback(imx7d_uart_disable_cb);
+	}
+
 }
 CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init);
-- 
2.5.0

[PATCH 0/8] i.MX early debug UART clock fixes

[Lucas Stach]

Am Donnerstag, den 27.08.2015, 18:39 +0200 schrieb Lucas Stach:
> This series fixes a long standing interaction issue between the
> kernels early debug facilities and the i.MX clock drivers.
> 
> Both earlyprintk and earlycon rely on the bootloader setup clocks
> for the UARTs to be retained during kernel init. As those clocks are
> only enabled in hardware, but not referenced in software they (or even
> their parent clocks) may get disabled as a result of other clocks being
> en-/disabled during boot.
> 
> This results in missing messages from the early debug console until the
> regular system console takes over, or even worse system hangs in response
> to unclocked register accesses. This renders those debugging facilities a
> lot less useful.
> 
> The fix implemented here is to check if any of this early debugging is
> enabled and keep the UART clocks referenced and enabled in that case.
> The clocks will then only be disabled at the end of kernel init, at which
> point the real console should have taken over and the early outputs being
> disabled.
> 
> I've runtime tested this on i.MX6Q and i.MX53, other platforms are only
> compile tested. This is mostly a mechanical change, but still I would
> appreciate some testing.
> 
And Philipp noted that passing in a list of clocks from the clock
providers look a lot better than the current direct clock enable calling
and the needed callback.

I'm self-nacking this series, so I can spin a V2 with changes as above.

> Regards,
> Lucas
> 
> Lucas Stach (8):
>   clk: imx: add common logic to detect early UART usage
>   clk: imx25: retain early UART clocks during kernel init
>   clk: imx27: retain early UART clocks during kernel init
>   clk: imx31: retain early UART clocks during kernel init
>   clk: imx35: retain early UART clocks during kernel init
>   clk: imx5: retain early UART clocks during kernel init
>   clk: imx6: retain early UART clocks during kernel init
>   clk: imx7d: retain early UART clocks during kernel init
> 
>  drivers/clk/imx/clk-imx25.c       | 20 ++++++++++++++++++++
>  drivers/clk/imx/clk-imx27.c       | 22 ++++++++++++++++++++++
>  drivers/clk/imx/clk-imx31.c       | 20 ++++++++++++++++++++
>  drivers/clk/imx/clk-imx35.c       | 16 ++++++++++++++++
>  drivers/clk/imx/clk-imx51-imx53.c | 28 ++++++++++++++++++++++++++++
>  drivers/clk/imx/clk-imx6q.c       | 12 ++++++++++++
>  drivers/clk/imx/clk-imx6sl.c      | 12 ++++++++++++
>  drivers/clk/imx/clk-imx6sx.c      | 12 ++++++++++++
>  drivers/clk/imx/clk-imx7d.c       | 22 ++++++++++++++++++++++
>  drivers/clk/imx/clk.c             | 33 +++++++++++++++++++++++++++++++++
>  drivers/clk/imx/clk.h             |  2 ++
>  11 files changed, 199 insertions(+)
> 

-- 
Pengutronix e.K.             | Lucas Stach                 |
Industrial Linux Solutions   | http://www.pengutronix.de/  |

[PATCH 0/8] i.MX early debug UART clock fixes

[Peter Hurley]

On 08/31/2015 12:36 PM, Lucas Stach wrote:
> I'm self-nacking this series, so I can spin a V2 with changes as above.

Hi Lucas,

Would you please copy the linux-serial list as well so that other ASoC
UART driver authors can reference how to fix similar issues in their drivers?

Regards,
Peter Hurley