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* [PATCH] pinctrl: sun5i: Fix a10s pwm1 pinctrl mapping
@ 2015-09-19 21:56 Hans de Goede
  2015-09-20 16:49 ` Maxime Ripard
  2015-10-02 10:33 ` Linus Walleij
  0 siblings, 2 replies; 3+ messages in thread
From: Hans de Goede @ 2015-09-19 21:56 UTC (permalink / raw)
  To: linux-arm-kernel

The comment for PG14 mux setting 3 already correctly states that this
muxes PG13 to pwm1, but the text ascociated with it said uart3, fix this.

Note that we use "pwm" rather then "pwm1" to be consistent with pwm0
where the mux setting is also simply called "pwm" and to be consistent
with sun4i/sun7i which do the same.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
index 6367661..f9a3f8f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
@@ -653,7 +653,7 @@ static const struct sunxi_desc_pin sun5i_a10s_pins[] = {
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
 		  SUNXI_FUNCTION(0x2, "spi1"),		/* CS1 */
-		  SUNXI_FUNCTION(0x3, "uart3"),		/* PWM1 */
+		  SUNXI_FUNCTION(0x3, "pwm"),		/* PWM1 */
 		  SUNXI_FUNCTION(0x5, "uart2"),		/* CTS */
 		  SUNXI_FUNCTION_IRQ(0x6, 13)),		/* EINT13 */
 };
-- 
2.4.3

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH] pinctrl: sun5i: Fix a10s pwm1 pinctrl mapping
  2015-09-19 21:56 [PATCH] pinctrl: sun5i: Fix a10s pwm1 pinctrl mapping Hans de Goede
@ 2015-09-20 16:49 ` Maxime Ripard
  2015-10-02 10:33 ` Linus Walleij
  1 sibling, 0 replies; 3+ messages in thread
From: Maxime Ripard @ 2015-09-20 16:49 UTC (permalink / raw)
  To: linux-arm-kernel

On Sat, Sep 19, 2015 at 05:56:44PM -0400, Hans de Goede wrote:
> The comment for PG14 mux setting 3 already correctly states that this
> muxes PG13 to pwm1, but the text ascociated with it said uart3, fix this.
> 
> Note that we use "pwm" rather then "pwm1" to be consistent with pwm0
> where the mux setting is also simply called "pwm" and to be consistent
> with sun4i/sun7i which do the same.
> 
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH] pinctrl: sun5i: Fix a10s pwm1 pinctrl mapping
  2015-09-19 21:56 [PATCH] pinctrl: sun5i: Fix a10s pwm1 pinctrl mapping Hans de Goede
  2015-09-20 16:49 ` Maxime Ripard
@ 2015-10-02 10:33 ` Linus Walleij
  1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2015-10-02 10:33 UTC (permalink / raw)
  To: linux-arm-kernel

On Sat, Sep 19, 2015 at 2:56 PM, Hans de Goede <hdegoede@redhat.com> wrote:

> The comment for PG14 mux setting 3 already correctly states that this
> muxes PG13 to pwm1, but the text ascociated with it said uart3, fix this.
>
> Note that we use "pwm" rather then "pwm1" to be consistent with pwm0
> where the mux setting is also simply called "pwm" and to be consistent
> with sun4i/sun7i which do the same.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Patch applied for fixes with Maxime's ACK.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2015-10-02 10:33 UTC | newest]

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2015-09-19 21:56 [PATCH] pinctrl: sun5i: Fix a10s pwm1 pinctrl mapping Hans de Goede
2015-09-20 16:49 ` Maxime Ripard
2015-10-02 10:33 ` Linus Walleij

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