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From: gregory.clement@free-electrons.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/7] irqchip: armada-370-xp: Rework per-cpu interrupts handling
Date: Fri, 25 Sep 2015 18:09:34 +0200	[thread overview]
Message-ID: <1443197378-30717-4-git-send-email-gregory.clement@free-electrons.com> (raw)
In-Reply-To: <1443197378-30717-1-git-send-email-gregory.clement@free-electrons.com>

From: Maxime Ripard <maxime.ripard@free-electrons.com>

The MPIC driver currently has a list of interrupts to handle as per-cpu.

Since the timer, fabric and neta interrupts were the only per-cpu
interrupts in the system, we can now remove the switch and just check for
the hardware irq number to determine whether a given interrupt is per-cpu
or not.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 drivers/irqchip/irq-armada-370-xp.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 39b72da0c143..117848b46eaa 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -56,9 +56,6 @@
 
 #define ARMADA_370_XP_MAX_PER_CPU_IRQS		(28)
 
-#define ARMADA_370_XP_TIMER0_PER_CPU_IRQ	(5)
-#define ARMADA_370_XP_FABRIC_IRQ		(3)
-
 #define IPI_DOORBELL_START                      (0)
 #define IPI_DOORBELL_END                        (8)
 #define IPI_DOORBELL_MASK                       0xFF
@@ -81,13 +78,10 @@ static phys_addr_t msi_doorbell_addr;
 
 static inline bool is_percpu_irq(irq_hw_number_t irq)
 {
-	switch (irq) {
-	case ARMADA_370_XP_TIMER0_PER_CPU_IRQ:
-	case ARMADA_370_XP_FABRIC_IRQ:
+	if (irq <= ARMADA_370_XP_MAX_PER_CPU_IRQS)
 		return true;
-	default:
-		return false;
-	}
+
+	return false;
 }
 
 /*
@@ -551,7 +545,7 @@ static void armada_370_xp_mpic_resume(void)
 		if (virq == 0)
 			continue;
 
-		if (irq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
+		if (!is_percpu_irq(irq))
 			writel(irq, per_cpu_int_base +
 			       ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
 		else
-- 
2.1.0

  parent reply	other threads:[~2015-09-25 16:09 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-25 16:09 [PATCH v2 0/7] net: mvneta: Switch to per-CPU irq and make rxq_def useful Gregory CLEMENT
2015-09-25 16:09 ` [PATCH v2 1/7] genirq: Fix the documentation of request_percpu_irq Gregory CLEMENT
2015-09-25 16:09 ` [PATCH v2 2/7] irq: Export per-cpu irq allocation and de-allocation functions Gregory CLEMENT
2015-09-30 14:56   ` Thomas Petazzoni
2015-09-25 16:09 ` Gregory CLEMENT [this message]
2015-09-25 16:09 ` [PATCH v2 4/7] net: mvneta: Fix CPU_MAP registers initialisation Gregory CLEMENT
2015-09-25 16:09 ` [PATCH v2 5/7] net: mvneta: Handle per-cpu interrupts Gregory CLEMENT
2015-09-25 16:09 ` [PATCH v2 6/7] net: mvneta: Allow different queues Gregory CLEMENT
2015-09-25 16:09 ` [PATCH v2 7/7] net: mvneta: Statically assign queues to CPUs Gregory CLEMENT
2015-09-29 18:51 ` [PATCH v2 0/7] net: mvneta: Switch to per-CPU irq and make rxq_def useful David Miller
2015-09-30 14:56   ` Thomas Gleixner
2015-09-30 15:40     ` David Miller
2015-09-30 17:39       ` Thomas Gleixner
2015-09-30 14:53 ` Thomas Gleixner

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