[PATCH 0/4] memory: pl17x: add support of PL175 and PL176 controllers

[PATCH 0/4] memory: pl17x: add support of PL175 and PL176 controllers

[Vladimir Zapolskiy]

The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
the static memory controllers on devices are similar to one found on
ARM PrimeCell PL172, add support to the existing driver.

Vladimir Zapolskiy (4):
  memory: pl172: correct MPMC peripheral ID register bits
  memory: pl172: add ARM PrimeCell PL175 MPMC support
  memory: pl172: add ARM PrimeCell PL176 MPMC support
  doc: dt: arm,pl172: add description of PL175 and PL176 controllers

 .../bindings/memory-controllers/arm,pl172.txt      |  8 ++++---
 drivers/memory/pl172.c                             | 26 +++++++++++++++++++---
 2 files changed, 28 insertions(+), 6 deletions(-)

-- 
2.1.4

[PATCH 1/4] memory: pl172: correct MPMC peripheral ID register bits

[Vladimir Zapolskiy]

According to PL172 TRM read of bits [7:6] of MPMCPeriphID3 is
undefined, so unmask them. Also the driver supports all currently
present revisions of PL172, this allows to alleviate requirements to
the revision version matched by the driver.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
 drivers/memory/pl172.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/memory/pl172.c b/drivers/memory/pl172.c
index b2ef6072..95a4ad7 100644
--- a/drivers/memory/pl172.c
+++ b/drivers/memory/pl172.c
@@ -278,9 +278,10 @@ static int pl172_remove(struct amba_device *adev)
 }
 
 static const struct amba_id pl172_ids[] = {
+	/*  PrimeCell MPMC PL172, EMC found on NXP LPC18xx and LPC43xx */
 	{
-		.id	= 0x07341172,
-		.mask	= 0xffffffff,
+		.id	= 0x07041172,
+		.mask	= 0x3f0fffff,
 	},
 	{ 0, 0 },
 };
-- 
2.1.4

[PATCH 2/4] memory: pl172: add ARM PrimeCell PL175 MPMC support

[Vladimir Zapolskiy]

The change adds support of ARM PrimeCell PL175 MPMC, the controller is
found on NXP LPC32xx SoC.

PL175 MPMC is very similar to PL172 controller, so it is preferred to
add its support into the existing driver.

One of the differences between PL172 and PL175 is that the latter one
supports up to 6 AHB ports, but still only 4 AHB ports can be assigned
to a static memory device, also PL175 does not have write buffer
enable control in static memory configuration register.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
 drivers/memory/pl172.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/memory/pl172.c b/drivers/memory/pl172.c
index 95a4ad7..cb6ebb8 100644
--- a/drivers/memory/pl172.c
+++ b/drivers/memory/pl172.c
@@ -118,7 +118,8 @@ static int pl172_setup_static(struct amba_device *adev,
 	if (of_property_read_bool(np, "mpmc,extended-wait"))
 		cfg |= MPMC_STATIC_CFG_EW;
 
-	if (of_property_read_bool(np, "mpmc,buffer-enable"))
+	if (amba_part(adev) == 0x172 &&
+	    of_property_read_bool(np, "mpmc,buffer-enable"))
 		cfg |= MPMC_STATIC_CFG_B;
 
 	if (of_property_read_bool(np, "mpmc,write-protect"))
@@ -190,6 +191,7 @@ static int pl172_parse_cs_config(struct amba_device *adev,
 }
 
 static const char * const pl172_revisions[] = {"r1", "r2", "r2p3", "r2p4"};
+static const char * const pl175_revisions[] = {"r1"};
 
 static int pl172_probe(struct amba_device *adev, const struct amba_id *id)
 {
@@ -202,6 +204,9 @@ static int pl172_probe(struct amba_device *adev, const struct amba_id *id)
 	if (amba_part(adev) == 0x172) {
 		if (amba_rev(adev) < ARRAY_SIZE(pl172_revisions))
 			rev = pl172_revisions[amba_rev(adev)];
+	} else if (amba_part(adev) == 0x175) {
+		if (amba_rev(adev) < ARRAY_SIZE(pl175_revisions))
+			rev = pl175_revisions[amba_rev(adev)];
 	}
 
 	dev_info(dev, "ARM PL%x revision %s\n", amba_part(adev), rev);
@@ -283,6 +288,11 @@ static const struct amba_id pl172_ids[] = {
 		.id	= 0x07041172,
 		.mask	= 0x3f0fffff,
 	},
+	/* PrimeCell MPMC PL175, EMC found on NXP LPC32xx */
+	{
+		.id	= 0x07041175,
+		.mask	= 0x3f0fffff,
+	},
 	{ 0, 0 },
 };
 MODULE_DEVICE_TABLE(amba, pl172_ids);
-- 
2.1.4

[PATCH 3/4] memory: pl172: add ARM PrimeCell PL176 MPMC support

[Vladimir Zapolskiy]

The change adds support of ARM PrimeCell PL176 MPMC.

Static memory configuration of PL175 MPMC is very similar to one found
on PL172 and PL175 controllers, so it is preferred to add its support
into the existing driver. The difference is that PL176 supports up to
10 slave ports (but only 4 of them may be connected to static memory
devices), AHB master bus width cab be 64-bit wide, also NAND devices
can be interfaced.

Similar to PL175 contoller, PL176 has no write buffer enable control
in static memory configuration register, the rest of static memory
configuration bits (with exception of NAND) is the same.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
 drivers/memory/pl172.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/memory/pl172.c b/drivers/memory/pl172.c
index cb6ebb8..ff57195 100644
--- a/drivers/memory/pl172.c
+++ b/drivers/memory/pl172.c
@@ -192,6 +192,7 @@ static int pl172_parse_cs_config(struct amba_device *adev,
 
 static const char * const pl172_revisions[] = {"r1", "r2", "r2p3", "r2p4"};
 static const char * const pl175_revisions[] = {"r1"};
+static const char * const pl176_revisions[] = {"r0"};
 
 static int pl172_probe(struct amba_device *adev, const struct amba_id *id)
 {
@@ -207,6 +208,9 @@ static int pl172_probe(struct amba_device *adev, const struct amba_id *id)
 	} else if (amba_part(adev) == 0x175) {
 		if (amba_rev(adev) < ARRAY_SIZE(pl175_revisions))
 			rev = pl175_revisions[amba_rev(adev)];
+	} else if (amba_part(adev) == 0x176) {
+		if (amba_rev(adev) < ARRAY_SIZE(pl176_revisions))
+			rev = pl176_revisions[amba_rev(adev)];
 	}
 
 	dev_info(dev, "ARM PL%x revision %s\n", amba_part(adev), rev);
@@ -293,6 +297,11 @@ static const struct amba_id pl172_ids[] = {
 		.id	= 0x07041175,
 		.mask	= 0x3f0fffff,
 	},
+	/* PrimeCell MPMC PL176 */
+	{
+		.id	= 0x89041176,
+		.mask	= 0xff0fffff,
+	},
 	{ 0, 0 },
 };
 MODULE_DEVICE_TABLE(amba, pl172_ids);
-- 
2.1.4

[PATCH 4/4] doc: dt: arm, pl172: add description of PL175 and PL176 controllers

[Vladimir Zapolskiy]

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree at vger.kernel.org
---
 .../devicetree/bindings/memory-controllers/arm,pl172.txt          | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/memory-controllers/arm,pl172.txt b/Documentation/devicetree/bindings/memory-controllers/arm,pl172.txt
index e6df32f..22b77ee 100644
--- a/Documentation/devicetree/bindings/memory-controllers/arm,pl172.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/arm,pl172.txt
@@ -1,8 +1,9 @@
-* Device tree bindings for ARM PL172 MultiPort Memory Controller
+* Device tree bindings for ARM PL172/PL175/PL176 MultiPort Memory Controller
 
 Required properties:
 
-- compatible:		"arm,pl172", "arm,primecell"
+- compatible:		Must be "arm,primecell" and exactly one from
+			"arm,pl172", "arm,pl175" or "arm,pl176".
 
 - reg:			Must contains offset/length value for controller.
 
@@ -56,7 +57,8 @@ Optional child cs node config properties:
 
 - mpmc,extended-wait:	Enable extended wait.
 
-- mpmc,buffer-enable:	Enable write buffer.
+- mpmc,buffer-enable:	Enable write buffer, option is not supported by
+			PL175 and PL176 controllers.
 
 - mpmc,write-protect:	Enable write protect.
 
-- 
2.1.4

[PATCH 0/4] memory: pl17x: add support of PL175 and PL176 controllers

[Joachim Eastwood]

Hi Vladimir,

On 28 September 2015 at 18:50, Vladimir Zapolskiy <vz@mleia.com> wrote:
> The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
> the static memory controllers on devices are similar to one found on
> ARM PrimeCell PL172, add support to the existing driver.
>
> Vladimir Zapolskiy (4):
>   memory: pl172: correct MPMC peripheral ID register bits
>   memory: pl172: add ARM PrimeCell PL175 MPMC support
>   memory: pl172: add ARM PrimeCell PL176 MPMC support
>   doc: dt: arm,pl172: add description of PL175 and PL176 controllers

Changes look good to me.

What LPC32xx board did you test this on, btw?

Also if you have added the controller to lpc32xx.dtsi it would be
great if you could also submit those changes to the lpc32xx
maintainer.


regards,
Joachim Eastwood

[PATCH 0/4] memory: pl17x: add support of PL175 and PL176 controllers

[Vladimir Zapolskiy]

Hi Joachim,

On 29.09.2015 23:39, Joachim Eastwood wrote:
> Hi Vladimir,
> 
> On 28 September 2015 at 18:50, Vladimir Zapolskiy <vz@mleia.com> wrote:
>> The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
>> the static memory controllers on devices are similar to one found on
>> ARM PrimeCell PL172, add support to the existing driver.
>>
>> Vladimir Zapolskiy (4):
>>   memory: pl172: correct MPMC peripheral ID register bits
>>   memory: pl172: add ARM PrimeCell PL175 MPMC support
>>   memory: pl172: add ARM PrimeCell PL176 MPMC support
>>   doc: dt: arm,pl172: add description of PL175 and PL176 controllers
> 
> Changes look good to me.
> 
> What LPC32xx board did you test this on, btw?

I tested PL175 on Timll Devkit3250 board with 4Mb NOR.

> Also if you have added the controller to lpc32xx.dtsi it would be
> great if you could also submit those changes to the lpc32xx
> maintainer.
> 

Right, this is in my plans. To avoid any mess in the controller driver,
mach-lpc32xx must be converted to common clock framework firstly, that's
what I'm doing at the moment, then I'll send the corresponding EMC
updates in lpc32xx.dtsi.

By the way I've tested your clocksource driver on LPC32xx and it works
fine, but again clean switching to it is not possible until LPC32xx
clocks are out of the common clock framework.

--
With best wishes,
Vladimir

[PATCH 0/4] memory: pl17x: add support of PL175 and PL176 controllers

[Joachim Eastwood]

On 29 September 2015 at 23:28, Vladimir Zapolskiy <vz@mleia.com> wrote:
> Hi Joachim,
>
> On 29.09.2015 23:39, Joachim Eastwood wrote:
>> Hi Vladimir,
>>
>> On 28 September 2015 at 18:50, Vladimir Zapolskiy <vz@mleia.com> wrote:
>>> The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
>>> the static memory controllers on devices are similar to one found on
>>> ARM PrimeCell PL172, add support to the existing driver.
>>>
>>> Vladimir Zapolskiy (4):
>>>   memory: pl172: correct MPMC peripheral ID register bits
>>>   memory: pl172: add ARM PrimeCell PL175 MPMC support
>>>   memory: pl172: add ARM PrimeCell PL176 MPMC support
>>>   doc: dt: arm,pl172: add description of PL175 and PL176 controllers
>>
>> Changes look good to me.
>>
>> What LPC32xx board did you test this on, btw?
>
> I tested PL175 on Timll Devkit3250 board with 4Mb NOR.

Okey, good.

I have now tested your changes on my two lpc18xx boards here and
everything seems fine.


>> Also if you have added the controller to lpc32xx.dtsi it would be
>> great if you could also submit those changes to the lpc32xx
>> maintainer.
>>
>
> Right, this is in my plans. To avoid any mess in the controller driver,
> mach-lpc32xx must be converted to common clock framework firstly, that's
> what I'm doing at the moment, then I'll send the corresponding EMC
> updates in lpc32xx.dtsi.

Nice to hear that you are working on a clk driver lpc32xx!


> By the way I've tested your clocksource driver on LPC32xx and it works
> fine, but again clean switching to it is not possible until LPC32xx
> clocks are out of the common clock framework.

ah, good, then we could eventually get rid of the timer driver in mach-lpc32xx.


regards,
Joachim Eastwood