linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/6] iommu/arm-smmu: remove redundant calculation of gr0 base address
Date: Thu, 15 Oct 2015 16:04:23 +0100	[thread overview]
Message-ID: <1444921464-14895-6-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1444921464-14895-1-git-send-email-will.deacon@arm.com>

Since commit 1463fe44fd0f ("iommu/arm-smmu: Don't use VMIDs for stage-1
translations"), we don't need the GR0 base address when initialising a
context bank, so remove the useless local variable and its init code.

Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 drivers/iommu/arm-smmu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 9aadf36a0747..7c20a68b5a95 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -709,9 +709,8 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain,
 	bool stage1;
 	struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
-	void __iomem *cb_base, *gr0_base, *gr1_base;
+	void __iomem *cb_base, *gr1_base;
 
-	gr0_base = ARM_SMMU_GR0(smmu);
 	gr1_base = ARM_SMMU_GR1(smmu);
 	stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS;
 	cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);
-- 
2.1.4

  parent reply	other threads:[~2015-10-15 15:04 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-15 15:04 [PATCH 0/6] iommu/arm-smmu: Updates for 4.4 Will Deacon
2015-10-15 15:04 ` [PATCH 1/6] iommu/arm-smmu: Use drvdata instead of maintaining smmu_devices list Will Deacon
2015-10-15 15:04 ` [PATCH 2/6] iommu/arm-smmu: Remove unneeded '0x' annotation Will Deacon
2015-10-15 15:04 ` [PATCH 3/6] iommu/arm-smmu: ThunderX mis-extends 64bit registers Will Deacon
2015-10-15 15:04 ` [PATCH 4/6] iommu/arm-smmu: fix error checking for ASID and VMID allocation Will Deacon
2015-10-15 15:04 ` Will Deacon [this message]
2015-10-15 15:04 ` [PATCH 6/6] iommu/arm-smmu: Add support for MSI on SMMUv3 Will Deacon
2015-10-15 15:25 ` [PATCH 0/6] iommu/arm-smmu: Updates for 4.4 Joerg Roedel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1444921464-14895-6-git-send-email-will.deacon@arm.com \
    --to=will.deacon@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).