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From: avanbrunt@nvidia.com (Alex Van Brunt)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] Revert "arm64: don't flag non-aliasing VIPT I-caches as aliasing"
Date: Wed, 28 Oct 2015 14:43:56 -0700	[thread overview]
Message-ID: <1446068637-11509-3-git-send-email-avanbrunt@nvidia.com> (raw)
In-Reply-To: <1446068637-11509-1-git-send-email-avanbrunt@nvidia.com>

This reverts commit 169c018de7b6d376f821f9fae0ab23dc5c7bb549.

Change-Id: I86627b6328b733d3bb5874832ca1a7543f75efc1
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
---
 arch/arm64/kernel/cpuinfo.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 540177a..e0c6c8c 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -51,18 +51,8 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
 	unsigned int cpu = smp_processor_id();
 	u32 l1ip = CTR_L1IP(info->reg_ctr);
 
-	if (l1ip != ICACHE_POLICY_PIPT) {
-		/*
-		 * VIPT caches are non-aliasing if the VA always equals the PA
-		 * in all bit positions that are covered by the index. This is
-		 * the case if the size of a way (# of sets * line size) does
-		 * not exceed PAGE_SIZE.
-		 */
-		u32 waysize = icache_get_numsets() * icache_get_linesize();
-
-		if (l1ip != ICACHE_POLICY_VIPT || waysize > PAGE_SIZE)
-			set_bit(ICACHEF_ALIASING, &__icache_flags);
-	}
+	if (l1ip != ICACHE_POLICY_PIPT)
+		set_bit(ICACHEF_ALIASING, &__icache_flags);
 	if (l1ip == ICACHE_POLICY_AIVIVT)
 		set_bit(ICACHEF_AIVIVT, &__icache_flags);
 
-- 
2.1.4

  parent reply	other threads:[~2015-10-28 21:43 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-28 21:43 [PATCH 0/3] Revert arm64 cache geometry Alex Van Brunt
2015-10-28 21:43 ` [PATCH 1/3] Revert "arm64: kernel: add support for cpu cache information" Alex Van Brunt
2015-10-28 21:43 ` Alex Van Brunt [this message]
2015-10-28 21:43 ` [PATCH 3/3] Revert "arm64: add helper functions to read I-cache attributes" Alex Van Brunt
2015-10-29  3:22 ` [PATCH 0/3] Revert arm64 cache geometry Ard Biesheuvel
2015-10-29 11:20   ` Mark Rutland
2015-10-29 12:26     ` Ard Biesheuvel
2015-10-29 15:43   ` Russell King - ARM Linux
2015-10-29 16:28     ` Ard Biesheuvel
2015-10-29 23:06       ` Alexander Van Brunt
2015-10-29 22:54   ` Alexander Van Brunt
2015-10-30 11:18     ` Will Deacon
2015-10-29 11:29 ` Mark Rutland
2015-10-29 11:43   ` Sudeep Holla
2015-10-29 11:40 ` Will Deacon
2015-10-29 23:03   ` Alexander Van Brunt
2015-10-30 11:00     ` Catalin Marinas
2015-10-30 11:10       ` Sudeep Holla
2015-10-30 11:57         ` Catalin Marinas
2015-10-30 12:27           ` Sudeep Holla

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