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From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5 20/26] perf: changing pmu::setup_aux() parameter to include event
Date: Sun, 29 Nov 2015 19:14:41 -0700	[thread overview]
Message-ID: <1448849687-5724-21-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1448849687-5724-1-git-send-email-mathieu.poirier@linaro.org>

For Coresight ETMv3/4 tracers the event carries information
about trace modes such as user or kernel space tracing and
whether tracing is allowed when operating in secure mode.

Since this information is to be embedded in the private
structure returned by setup_aux(),  changing the first
parameter to be of type struct perf_event * so that all
the necessary information can be conveyed.  Also changing
current customer of the API to reflect the modification.

Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 arch/x86/kernel/cpu/perf_event_intel_bts.c | 4 +++-
 arch/x86/kernel/cpu/perf_event_intel_pt.c  | 5 +++--
 include/linux/perf_event.h                 | 2 +-
 kernel/events/ring_buffer.c                | 2 +-
 4 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_bts.c b/arch/x86/kernel/cpu/perf_event_intel_bts.c
index 2cad71d1b14c..4bb5bdc092f5 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_bts.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_bts.c
@@ -68,10 +68,12 @@ static size_t buf_size(struct page *page)
 }
 
 static void *
-bts_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool overwrite)
+bts_buffer_setup_aux(struct perf_event *event, void **pages,
+		     int nr_pages, bool overwrite)
 {
 	struct bts_buffer *buf;
 	struct page *page;
+	int cpu = event->cpu;
 	int node = (cpu == -1) ? cpu : cpu_to_node(cpu);
 	unsigned long offset;
 	size_t size = nr_pages << PAGE_SHIFT;
diff --git a/arch/x86/kernel/cpu/perf_event_intel_pt.c b/arch/x86/kernel/cpu/perf_event_intel_pt.c
index 868e1194337f..ba8077cbc755 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_pt.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_pt.c
@@ -860,10 +860,11 @@ static int pt_buffer_init_topa(struct pt_buffer *buf, unsigned long nr_pages,
  * Return:	Our private PT buffer structure.
  */
 static void *
-pt_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool snapshot)
+pt_buffer_setup_aux(struct perf_event *event, void **pages,
+		    int nr_pages, bool snapshot)
 {
 	struct pt_buffer *buf;
-	int node, ret;
+	int node, ret, cpu = event->cpu;
 
 	if (!nr_pages)
 		return NULL;
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index d841d33bcdc9..da02d4a0baa2 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -378,7 +378,7 @@ struct pmu {
 	/*
 	 * Set up pmu-private data structures for an AUX area
 	 */
-	void *(*setup_aux)		(int cpu, void **pages,
+	void *(*setup_aux)		(struct perf_event *event, void **pages,
 					 int nr_pages, bool overwrite);
 					/* optional */
 
diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c
index b5d1ea79c595..b1316d12bb40 100644
--- a/kernel/events/ring_buffer.c
+++ b/kernel/events/ring_buffer.c
@@ -522,7 +522,7 @@ int rb_alloc_aux(struct ring_buffer *rb, struct perf_event *event,
 			goto out;
 	}
 
-	rb->aux_priv = event->pmu->setup_aux(event->cpu, rb->aux_pages, nr_pages,
+	rb->aux_priv = event->pmu->setup_aux(event, rb->aux_pages, nr_pages,
 					     overwrite);
 	if (!rb->aux_priv)
 		goto out;
-- 
2.1.4

  parent reply	other threads:[~2015-11-30  2:14 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-30  2:14 [PATCH V5 00/26] Coresight integration with perf Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 01/26] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 02/26] coresight: etm3x: moving sysFS entries to dedicated file Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 03/26] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 04/26] coresight: etm3x: splitting struct etm_drvdata Mathieu Poirier
2015-11-30  6:54   ` kbuild test robot
2015-11-30  2:14 ` [PATCH V5 05/26] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 06/26] coresight: associating path with session rather than tracer Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 07/26] coresight: moving PM runtime operations to core framework Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 08/26] coresight: etm3x: adding operation mode for etm_enable() Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 09/26] coresight: add API to get sink from path Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 10/26] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 11/26] coresight: etm3x: changing default trace configuration Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 12/26] coresight: etm3x: consolidating initial config Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 13/26] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 14/26] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 15/26] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 16/26] coresight: etb10: moving to local atomic operations Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 17/26] coresight: adding operation mode for sink->enable() Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 18/26] coresight: etb10: implementing AUX space API Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 19/26] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-11-30  2:14 ` Mathieu Poirier [this message]
2015-11-30  2:14 ` [PATCH V5 21/26] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-11-30 23:23   ` Alexander Shishkin
2015-12-01 17:25     ` Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 22/26] coresight: introducing a global trace ID function Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 23/26] perf tools: making function set_max_cpu_num() non static Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 24/26] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier
2015-11-30 16:15   ` Arnaldo Carvalho de Melo
2015-11-30  2:14 ` [PATCH V5 25/26] perf tools: making coresight PMU listable Mathieu Poirier
2015-11-30  2:14 ` [PATCH V5 26/26] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier

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