From: bharat.kumar.gogada@xilinx.com (Bharat Kumar Gogada)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Date: Tue, 12 Jan 2016 10:56:37 +0530 [thread overview]
Message-ID: <1452576399-1513-4-git-send-email-bharatku@xilinx.com> (raw)
In-Reply-To: <1452576399-1513-1-git-send-email-bharatku@xilinx.com>
Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
Zynq and Microblaze Architectures.
With these modifications drivers/pci/host/pcie-xilinx.c, will
work on both Zynq and Microblaze Architectures.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
---
Changes:
Changed Total number of MSI IRQ count logic according to both architectures.
Updated MSI assigning functions accordingly to new count.
Modified irq_domain_add_linear with new MSI IRQ count.
Added #ifdef to pci_fixup_irqs which are ARM specific API.
---
drivers/pci/host/pcie-xilinx.c | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 3e3757f..05f6f2e 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -93,6 +93,11 @@
/* Number of MSI IRQs */
#define XILINX_NUM_MSI_IRQS 128
+#ifdef CONFIG_ARM
+#define TOT_NR_IRQS XILINX_NUM_MSI_IRQS
+#else
+#define TOT_NR_IRQS (NR_IRQS + XILINX_NUM_MSI_IRQS)
+#endif
/**
@@ -238,15 +243,20 @@ static void xilinx_pcie_destroy_msi(unsigned int irq)
*/
static int xilinx_pcie_assign_msi(struct xilinx_pcie_port *port)
{
+ int irq;
int pos;
pos = find_first_zero_bit(msi_irq_in_use, XILINX_NUM_MSI_IRQS);
- if (pos < XILINX_NUM_MSI_IRQS)
+ irq = pos;
+#ifdef CONFIG_MICROBLAZE
+ irq = XILINX_NUM_MSI_IRQS + pos;
+#endif
+ if (irq < TOT_NR_IRQS)
set_bit(pos, msi_irq_in_use);
else
return -ENOSPC;
- return pos;
+ return irq;
}
/**
@@ -520,7 +530,7 @@ static void xilinx_pcie_free_irq_domain(struct xilinx_pcie_port *port)
free_pages(port->msi_pages, 0);
- num_irqs = XILINX_NUM_MSI_IRQS;
+ num_irqs = TOT_NR_IRQS;
} else {
/* INTx */
num_irqs = 4;
@@ -565,7 +575,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port)
/* Setup MSI */
if (IS_ENABLED(CONFIG_PCI_MSI)) {
port->irq_domain = irq_domain_add_linear(node,
- XILINX_NUM_MSI_IRQS,
+ TOT_NR_IRQS,
&msi_domain_ops,
&xilinx_pcie_msi_chip);
if (!port->irq_domain) {
@@ -705,7 +715,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
#endif
pci_scan_child_bus(bus);
pci_assign_unassigned_bus_resources(bus);
+#ifdef CONFIG_ARM
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
+#endif
pci_bus_add_devices(bus);
platform_set_drvdata(pdev, port);
--
2.1.1
next prev parent reply other threads:[~2016-01-12 5:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-12 5:26 [PATCH 0/5] PCIe Xilinx with generic driver for Microblaze and Bharat Kumar Gogada
2016-01-12 5:26 ` [PATCH 1/5] PCI: xilinx: Removing xilinx_pcie_parse_and_add_res function Bharat Kumar Gogada
2016-01-12 9:55 ` kbuild test robot
2016-01-12 11:31 ` Bharat Kumar Gogada
2016-01-12 5:26 ` [PATCH 2/5] PCI: xilinx: Removing struct hw_irq structure Bharat Kumar Gogada
2016-01-12 5:26 ` Bharat Kumar Gogada [this message]
2016-01-12 5:26 ` [PATCH 4/5] PCI: xilinx: Updating Zynq PCI binding documentation with Microblaze node Bharat Kumar Gogada
2016-01-13 2:14 ` Rob Herring
2016-01-12 5:26 ` [PATCH 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Bharat Kumar Gogada
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