From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V8 04/23] coresight: etm3x: moving etm_readl/writel to header file
Date: Thu, 14 Jan 2016 14:45:58 -0700 [thread overview]
Message-ID: <1452807977-8069-5-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1452807977-8069-1-git-send-email-mathieu.poirier@linaro.org>
Moving functions etm_readl/writel to file "coresight-etm.h"
so that the main ETM3x driver can be split in more than one
file.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/hwtracing/coresight/coresight-etm.h | 29 +++++++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-etm3x.c | 29 ---------------------------
2 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h
index b4481eb29304..34f7db881fa7 100644
--- a/drivers/hwtracing/coresight/coresight-etm.h
+++ b/drivers/hwtracing/coresight/coresight-etm.h
@@ -251,4 +251,33 @@ enum etm_addr_type {
ETM_ADDR_TYPE_START,
ETM_ADDR_TYPE_STOP,
};
+
+static inline void etm_writel(struct etm_drvdata *drvdata,
+ u32 val, u32 off)
+{
+ if (drvdata->use_cp14) {
+ if (etm_writel_cp14(off, val)) {
+ dev_err(drvdata->dev,
+ "invalid CP14 access to ETM reg: %#x", off);
+ }
+ } else {
+ writel_relaxed(val, drvdata->base + off);
+ }
+}
+
+static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)
+{
+ u32 val;
+
+ if (drvdata->use_cp14) {
+ if (etm_readl_cp14(off, &val)) {
+ dev_err(drvdata->dev,
+ "invalid CP14 access to ETM reg: %#x", off);
+ }
+ } else {
+ val = readl_relaxed(drvdata->base + off);
+ }
+
+ return val;
+}
#endif
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index fae66cb45424..3be1f14da44c 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -42,35 +42,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO);
static int etm_count;
static struct etm_drvdata *etmdrvdata[NR_CPUS];
-static inline void etm_writel(struct etm_drvdata *drvdata,
- u32 val, u32 off)
-{
- if (drvdata->use_cp14) {
- if (etm_writel_cp14(off, val)) {
- dev_err(drvdata->dev,
- "invalid CP14 access to ETM reg: %#x", off);
- }
- } else {
- writel_relaxed(val, drvdata->base + off);
- }
-}
-
-static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)
-{
- u32 val;
-
- if (drvdata->use_cp14) {
- if (etm_readl_cp14(off, &val)) {
- dev_err(drvdata->dev,
- "invalid CP14 access to ETM reg: %#x", off);
- }
- } else {
- val = readl_relaxed(drvdata->base + off);
- }
-
- return val;
-}
-
/*
* Memory mapped writes to clear os lock are not supported on some processors
* and OS lock must be unlocked before any memory mapped access on such
--
2.1.4
next prev parent reply other threads:[~2016-01-14 21:45 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-14 21:45 [PATCH V8 00/23] Coresight integration with perf Mathieu Poirier
2016-01-14 21:45 ` [PATCH V8 01/23] coresight: associating path with session rather than tracer Mathieu Poirier
2016-01-14 21:45 ` [PATCH V8 02/23] coresight: add API to get sink from path Mathieu Poirier
2016-01-14 21:45 ` [PATCH V8 03/23] coresight: moving PM runtime operations to core framework Mathieu Poirier
2016-01-14 21:45 ` Mathieu Poirier [this message]
2016-01-14 21:45 ` [PATCH V8 05/23] coresight: etm3x: moving sysFS entries to dedicated file Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 06/23] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 07/23] coresight: etm3x: splitting struct etm_drvdata Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 08/23] coresight: etm3x: adding operation mode for etm_enable() Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 09/23] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 10/23] coresight: etm3x: changing default trace configuration Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 11/23] coresight: etm3x: consolidating initial config Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 12/23] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 13/23] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 14/23] coresight: etb10: moving to local atomic operations Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 15/23] coresight: etb10: adding operation mode for sink->enable() Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 16/23] coresight: etb10: implementing AUX API Mathieu Poirier
2016-01-26 15:53 ` Alexander Shishkin
2016-01-27 20:55 ` Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 17/23] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 18/23] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2016-01-26 15:27 ` Alexander Shishkin
2016-01-27 18:33 ` Mathieu Poirier
2016-01-28 15:42 ` Alexander Shishkin
2016-01-28 21:12 ` Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 19/23] coresight: introducing a global trace ID function Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 20/23] perf tools: making function set_max_cpu_num() non static Mathieu Poirier
2016-01-25 20:46 ` Mathieu Poirier
2016-01-25 21:12 ` Arnaldo Carvalho de Melo
2016-01-25 21:29 ` Arnaldo Carvalho de Melo
2016-01-26 17:08 ` Mathieu Poirier
2016-01-26 18:51 ` Arnaldo Carvalho de Melo
2016-01-27 16:24 ` Mathieu Poirier
2016-01-14 21:46 ` [PATCH V8 21/23] perf tools: adding perf_evlist to *info_priv_size() Mathieu Poirier
2016-01-25 20:48 ` Mathieu Poirier
2016-01-25 21:08 ` Arnaldo Carvalho de Melo
2016-01-26 14:27 ` Adrian Hunter
2016-01-26 14:33 ` Arnaldo Carvalho de Melo
2016-01-29 10:14 ` Adrian Hunter
2016-01-14 21:46 ` [PATCH V8 22/23] perf tools: making coresight PMU listable Mathieu Poirier
2016-01-25 20:49 ` Mathieu Poirier
2016-01-25 21:10 ` Arnaldo Carvalho de Melo
2016-01-29 10:24 ` Adrian Hunter
2016-01-14 21:46 ` [PATCH V8 23/23] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier
2016-01-25 20:51 ` Mathieu Poirier
2016-01-25 21:10 ` Arnaldo Carvalho de Melo
2016-01-29 10:34 ` Adrian Hunter
2016-01-29 17:37 ` Mathieu Poirier
2016-01-29 21:12 ` Arnaldo Carvalho de Melo
2016-01-29 22:24 ` Mathieu Poirier
2016-02-02 16:20 ` Mathieu Poirier
2016-02-02 16:41 ` Arnaldo Carvalho de Melo
2016-02-03 16:11 ` Mathieu Poirier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1452807977-8069-5-git-send-email-mathieu.poirier@linaro.org \
--to=mathieu.poirier@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).