* [PATCH] ARM: dts: imx6: enable pl310 "shared attribute override enable" bit
@ 2016-01-21 4:40 Fugang Duan
0 siblings, 0 replies; 6+ messages in thread
From: Fugang Duan @ 2016-01-21 4:40 UTC (permalink / raw)
To: linux-arm-kernel
The default behavior of the L220 or PL310 cache controllers with respect
to the shareable attribute is to transform "normal memory non-cacheable
transactions" into "cacheable no allocate" (for reads) or "write through
no write allocate" (for writes).
On i.MX6 series platforms, enet/audio/usb/nand DMA buffer have corruption
without CMA. So set this property "arm,shared-override" in L2 dts node to
enable "shared attribute override enable" bit.
Signed-off-by: Fugang Duan <B38611@freescale.com>
---
arch/arm/boot/dts/imx6qdl.dtsi | 1 +
arch/arm/boot/dts/imx6sl.dtsi | 1 +
arch/arm/boot/dts/imx6sx.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 4f6ae92..b4de39a 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -185,6 +185,7 @@
cache-level = <2>;
arm,tag-latency = <4 2 3>;
arm,data-latency = <4 2 3>;
+ arm,shared-override;
};
pcie: pcie at 0x01000000 {
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index d12b250..3b80b45 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -113,6 +113,7 @@
cache-level = <2>;
arm,tag-latency = <4 2 3>;
arm,data-latency = <4 2 3>;
+ arm,shared-override;
};
pmu {
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index a5f7602..42f8f3b 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -155,6 +155,7 @@
cache-level = <2>;
arm,tag-latency = <4 2 3>;
arm,data-latency = <4 2 3>;
+ arm,shared-override;
};
dma_apbh: dma-apbh at 01804000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH] ARM: dts: imx6: enable pl310 "shared attribute override enable" bit
@ 2016-01-21 3:28 Fugang Duan
2016-01-21 5:08 ` Stefan Agner
2016-01-21 9:20 ` Lucas Stach
0 siblings, 2 replies; 6+ messages in thread
From: Fugang Duan @ 2016-01-21 3:28 UTC (permalink / raw)
To: linux-arm-kernel
The default behavior of the L220 or PL310 cache controllers with respect
to the shareable attribute is to transform "normal memory non-cacheable
transactions" into "cacheable no allocate" (for reads) or "write through
no write allocate" (for writes).
On i.MX6 series platforms, enet/audio/usb/nand DMA buffer have corruption
without CMA. So set this property "arm,shared-override" in L2 dts node to
enable "shared attribute override enable" bit.
Signed-off-by: Fugang Duan <B38611@freescale.com>
---
arch/arm/boot/dts/imx6qdl.dtsi | 1 +
arch/arm/boot/dts/imx6sl.dtsi | 1 +
arch/arm/boot/dts/imx6sx.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 4f6ae92..b4de39a 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -185,6 +185,7 @@
cache-level = <2>;
arm,tag-latency = <4 2 3>;
arm,data-latency = <4 2 3>;
+ arm,shared-override;
};
pcie: pcie at 0x01000000 {
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index d12b250..3b80b45 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -113,6 +113,7 @@
cache-level = <2>;
arm,tag-latency = <4 2 3>;
arm,data-latency = <4 2 3>;
+ arm,shared-override;
};
pmu {
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index a5f7602..42f8f3b 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -155,6 +155,7 @@
cache-level = <2>;
arm,tag-latency = <4 2 3>;
arm,data-latency = <4 2 3>;
+ arm,shared-override;
};
dma_apbh: dma-apbh at 01804000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH] ARM: dts: imx6: enable pl310 "shared attribute override enable" bit
2016-01-21 3:28 Fugang Duan
@ 2016-01-21 5:08 ` Stefan Agner
2016-01-21 9:21 ` Lucas Stach
2016-01-21 9:20 ` Lucas Stach
1 sibling, 1 reply; 6+ messages in thread
From: Stefan Agner @ 2016-01-21 5:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi Andy,
On 2016-01-20 19:28, Fugang Duan wrote:
> The default behavior of the L220 or PL310 cache controllers with respect
> to the shareable attribute is to transform "normal memory non-cacheable
> transactions" into "cacheable no allocate" (for reads) or "write through
> no write allocate" (for writes).
>
> On i.MX6 series platforms, enet/audio/usb/nand DMA buffer have corruption
> without CMA. So set this property "arm,shared-override" in L2 dts node to
> enable "shared attribute override enable" bit.
Do you happen to know if Vybrid could also suffer this too? Some IP's
are the same/similar ones...
Did this manifest in any way?
--
Stefan
>
> Signed-off-by: Fugang Duan <B38611@freescale.com>
> ---
> arch/arm/boot/dts/imx6qdl.dtsi | 1 +
> arch/arm/boot/dts/imx6sl.dtsi | 1 +
> arch/arm/boot/dts/imx6sx.dtsi | 1 +
> 3 files changed, 3 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index 4f6ae92..b4de39a 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -185,6 +185,7 @@
> cache-level = <2>;
> arm,tag-latency = <4 2 3>;
> arm,data-latency = <4 2 3>;
> + arm,shared-override;
> };
>
> pcie: pcie at 0x01000000 {
> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index d12b250..3b80b45 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -113,6 +113,7 @@
> cache-level = <2>;
> arm,tag-latency = <4 2 3>;
> arm,data-latency = <4 2 3>;
> + arm,shared-override;
> };
>
> pmu {
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index a5f7602..42f8f3b 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -155,6 +155,7 @@
> cache-level = <2>;
> arm,tag-latency = <4 2 3>;
> arm,data-latency = <4 2 3>;
> + arm,shared-override;
> };
>
> dma_apbh: dma-apbh at 01804000 {
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH] ARM: dts: imx6: enable pl310 "shared attribute override enable" bit
2016-01-21 5:08 ` Stefan Agner
@ 2016-01-21 9:21 ` Lucas Stach
2016-01-22 4:43 ` Stefan Agner
0 siblings, 1 reply; 6+ messages in thread
From: Lucas Stach @ 2016-01-21 9:21 UTC (permalink / raw)
To: linux-arm-kernel
Am Mittwoch, den 20.01.2016, 21:08 -0800 schrieb Stefan Agner:
> Hi Andy,
>
> On 2016-01-20 19:28, Fugang Duan wrote:
> > The default behavior of the L220 or PL310 cache controllers with respect
> > to the shareable attribute is to transform "normal memory non-cacheable
> > transactions" into "cacheable no allocate" (for reads) or "write through
> > no write allocate" (for writes).
> >
> > On i.MX6 series platforms, enet/audio/usb/nand DMA buffer have corruption
> > without CMA. So set this property "arm,shared-override" in L2 dts node to
> > enable "shared attribute override enable" bit.
>
> Do you happen to know if Vybrid could also suffer this too? Some IP's
> are the same/similar ones...
>
This is a bug in the default configuration of the PL310 L2 cache
controller. AFAIK Vybrid does not use this IP block, so it should be
safe.
Regards,
Lucas
> Did this manifest in any way?
>
> --
> Stefan
>
>
> >
> > Signed-off-by: Fugang Duan <B38611@freescale.com>
> > ---
> > arch/arm/boot/dts/imx6qdl.dtsi | 1 +
> > arch/arm/boot/dts/imx6sl.dtsi | 1 +
> > arch/arm/boot/dts/imx6sx.dtsi | 1 +
> > 3 files changed, 3 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> > index 4f6ae92..b4de39a 100644
> > --- a/arch/arm/boot/dts/imx6qdl.dtsi
> > +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> > @@ -185,6 +185,7 @@
> > cache-level = <2>;
> > arm,tag-latency = <4 2 3>;
> > arm,data-latency = <4 2 3>;
> > + arm,shared-override;
> > };
> >
> > pcie: pcie at 0x01000000 {
> > diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> > index d12b250..3b80b45 100644
> > --- a/arch/arm/boot/dts/imx6sl.dtsi
> > +++ b/arch/arm/boot/dts/imx6sl.dtsi
> > @@ -113,6 +113,7 @@
> > cache-level = <2>;
> > arm,tag-latency = <4 2 3>;
> > arm,data-latency = <4 2 3>;
> > + arm,shared-override;
> > };
> >
> > pmu {
> > diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> > index a5f7602..42f8f3b 100644
> > --- a/arch/arm/boot/dts/imx6sx.dtsi
> > +++ b/arch/arm/boot/dts/imx6sx.dtsi
> > @@ -155,6 +155,7 @@
> > cache-level = <2>;
> > arm,tag-latency = <4 2 3>;
> > arm,data-latency = <4 2 3>;
> > + arm,shared-override;
> > };
> >
> > dma_apbh: dma-apbh at 01804000 {
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH] ARM: dts: imx6: enable pl310 "shared attribute override enable" bit
2016-01-21 9:21 ` Lucas Stach
@ 2016-01-22 4:43 ` Stefan Agner
0 siblings, 0 replies; 6+ messages in thread
From: Stefan Agner @ 2016-01-22 4:43 UTC (permalink / raw)
To: linux-arm-kernel
On 2016-01-21 01:21, Lucas Stach wrote:
> Am Mittwoch, den 20.01.2016, 21:08 -0800 schrieb Stefan Agner:
>> Hi Andy,
>>
>> On 2016-01-20 19:28, Fugang Duan wrote:
>> > The default behavior of the L220 or PL310 cache controllers with respect
>> > to the shareable attribute is to transform "normal memory non-cacheable
>> > transactions" into "cacheable no allocate" (for reads) or "write through
>> > no write allocate" (for writes).
>> >
>> > On i.MX6 series platforms, enet/audio/usb/nand DMA buffer have corruption
>> > without CMA. So set this property "arm,shared-override" in L2 dts node to
>> > enable "shared attribute override enable" bit.
>>
>> Do you happen to know if Vybrid could also suffer this too? Some IP's
>> are the same/similar ones...
>>
> This is a bug in the default configuration of the PL310 L2 cache
> controller. AFAIK Vybrid does not use this IP block, so it should be
> safe.
The ones with a 1 in the second digit come with the PL310 L2 cache
controller (e.g. VF610). Currently U-Boot does not touch the L2 cache
controller at all, however, reading this discussion sounds like this
would be a good idea in the future...
--
Stefan
>> Did this manifest in any way?
>>
>> --
>> Stefan
>>
>>
>> >
>> > Signed-off-by: Fugang Duan <B38611@freescale.com>
>> > ---
>> > arch/arm/boot/dts/imx6qdl.dtsi | 1 +
>> > arch/arm/boot/dts/imx6sl.dtsi | 1 +
>> > arch/arm/boot/dts/imx6sx.dtsi | 1 +
>> > 3 files changed, 3 insertions(+)
>> >
>> > diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
>> > index 4f6ae92..b4de39a 100644
>> > --- a/arch/arm/boot/dts/imx6qdl.dtsi
>> > +++ b/arch/arm/boot/dts/imx6qdl.dtsi
>> > @@ -185,6 +185,7 @@
>> > cache-level = <2>;
>> > arm,tag-latency = <4 2 3>;
>> > arm,data-latency = <4 2 3>;
>> > + arm,shared-override;
>> > };
>> >
>> > pcie: pcie at 0x01000000 {
>> > diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
>> > index d12b250..3b80b45 100644
>> > --- a/arch/arm/boot/dts/imx6sl.dtsi
>> > +++ b/arch/arm/boot/dts/imx6sl.dtsi
>> > @@ -113,6 +113,7 @@
>> > cache-level = <2>;
>> > arm,tag-latency = <4 2 3>;
>> > arm,data-latency = <4 2 3>;
>> > + arm,shared-override;
>> > };
>> >
>> > pmu {
>> > diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
>> > index a5f7602..42f8f3b 100644
>> > --- a/arch/arm/boot/dts/imx6sx.dtsi
>> > +++ b/arch/arm/boot/dts/imx6sx.dtsi
>> > @@ -155,6 +155,7 @@
>> > cache-level = <2>;
>> > arm,tag-latency = <4 2 3>;
>> > arm,data-latency = <4 2 3>;
>> > + arm,shared-override;
>> > };
>> >
>> > dma_apbh: dma-apbh at 01804000 {
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] ARM: dts: imx6: enable pl310 "shared attribute override enable" bit
2016-01-21 3:28 Fugang Duan
2016-01-21 5:08 ` Stefan Agner
@ 2016-01-21 9:20 ` Lucas Stach
1 sibling, 0 replies; 6+ messages in thread
From: Lucas Stach @ 2016-01-21 9:20 UTC (permalink / raw)
To: linux-arm-kernel
Am Donnerstag, den 21.01.2016, 11:28 +0800 schrieb Fugang Duan:
> The default behavior of the L220 or PL310 cache controllers with respect
> to the shareable attribute is to transform "normal memory non-cacheable
> transactions" into "cacheable no allocate" (for reads) or "write through
> no write allocate" (for writes).
>
> On i.MX6 series platforms, enet/audio/usb/nand DMA buffer have corruption
> without CMA. So set this property "arm,shared-override" in L2 dts node to
> enable "shared attribute override enable" bit.
>
I'm not comfortable with this change. This is something that the
bootloader/firmware should configure as this will crash if kernel is
booted as non-secure.
Both U-Boot and Barebox are doing this configuration.
Regards,
Lucas
> Signed-off-by: Fugang Duan <B38611@freescale.com>
> ---
> arch/arm/boot/dts/imx6qdl.dtsi | 1 +
> arch/arm/boot/dts/imx6sl.dtsi | 1 +
> arch/arm/boot/dts/imx6sx.dtsi | 1 +
> 3 files changed, 3 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index 4f6ae92..b4de39a 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -185,6 +185,7 @@
> cache-level = <2>;
> arm,tag-latency = <4 2 3>;
> arm,data-latency = <4 2 3>;
> + arm,shared-override;
> };
>
> pcie: pcie at 0x01000000 {
> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index d12b250..3b80b45 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -113,6 +113,7 @@
> cache-level = <2>;
> arm,tag-latency = <4 2 3>;
> arm,data-latency = <4 2 3>;
> + arm,shared-override;
> };
>
> pmu {
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index a5f7602..42f8f3b 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -155,6 +155,7 @@
> cache-level = <2>;
> arm,tag-latency = <4 2 3>;
> arm,data-latency = <4 2 3>;
> + arm,shared-override;
> };
>
> dma_apbh: dma-apbh at 01804000 {
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-01-22 4:43 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2016-01-21 4:40 [PATCH] ARM: dts: imx6: enable pl310 "shared attribute override enable" bit Fugang Duan
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2016-01-21 3:28 Fugang Duan
2016-01-21 5:08 ` Stefan Agner
2016-01-21 9:21 ` Lucas Stach
2016-01-22 4:43 ` Stefan Agner
2016-01-21 9:20 ` Lucas Stach
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