From: juri.lelli@arm.com (Juri Lelli)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 6/8] arm64, dts: add Juno cpu capacity information
Date: Fri, 18 Mar 2016 14:24:12 +0000 [thread overview]
Message-ID: <1458311054-13524-7-git-send-email-juri.lelli@arm.com> (raw)
In-Reply-To: <1458311054-13524-1-git-send-email-juri.lelli@arm.com>
Add Juno cpu capacity bindings information.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jon Medhurst <tixy@linaro.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: devicetree at vger.kernel.org
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
---
Changes from v1:
- capacity-scale removed
---
arch/arm64/boot/dts/arm/juno.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index dcfcf15..a15c781 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -90,6 +90,7 @@
next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ capacity = <1024>;
};
A57_1: cpu at 1 {
@@ -100,6 +101,7 @@
next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ capacity = <1024>;
};
A53_0: cpu at 100 {
@@ -110,6 +112,7 @@
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ capacity = <447>;
};
A53_1: cpu at 101 {
@@ -120,6 +123,7 @@
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ capacity = <447>;
};
A53_2: cpu at 102 {
@@ -130,6 +134,7 @@
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ capacity = <447>;
};
A53_3: cpu at 103 {
@@ -140,6 +145,7 @@
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ capacity = <447>;
};
A57_L2: l2-cache0 {
--
2.7.0
next prev parent reply other threads:[~2016-03-18 14:24 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-18 14:24 [PATCH v4 0/8] CPUs capacity information for heterogeneous systems Juri Lelli
2016-03-18 14:24 ` [PATCH v4 1/8] ARM: initialize cpu_scale to its default Juri Lelli
2016-03-18 14:24 ` [PATCH v4 2/8] Documentation: arm: define DT cpu capacity bindings Juri Lelli
2016-03-18 17:49 ` Sai Gurrappadi
2016-03-21 10:53 ` Juri Lelli
2016-03-21 11:09 ` Vincent Guittot
2016-03-21 11:49 ` Juri Lelli
2016-03-21 12:12 ` Mark Brown
2016-03-21 17:24 ` Juri Lelli
2016-03-21 17:51 ` Mark Brown
2016-03-22 9:50 ` Juri Lelli
2016-03-21 19:20 ` Sai Gurrappadi
2016-03-20 1:15 ` Rob Herring
2016-03-21 11:39 ` Juri Lelli
2016-03-18 14:24 ` [PATCH v4 3/8] arm: parse cpu capacity from DT Juri Lelli
2016-03-18 14:24 ` [PATCH v4 4/8] arm, dts: add TC2 cpu capacity information Juri Lelli
2016-03-18 14:24 ` [PATCH v4 5/8] arm64: parse cpu capacity from DT Juri Lelli
2016-03-18 14:24 ` Juri Lelli [this message]
2016-03-18 14:24 ` [PATCH v4 7/8] arm: add sysfs cpu_capacity attribute Juri Lelli
2016-03-18 14:24 ` [PATCH v4 8/8] arm64: " Juri Lelli
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