* [PATCH 10/17] qcom: ipq4019: add watchdog node to ipq4019 SoC and DK01 device tree
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
@ 2016-03-23 22:05 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 11/17] qcom: ipq4019: add support for reset via qcom,ps-hold Matthew McClintock
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
To: linux-arm-kernel
This will allow boards to enable watchdog support
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 4 ++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 ++++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index fe78f3f..223da1a 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -55,5 +55,9 @@
pinctrl-names = "default";
status = "ok";
};
+
+ watchdog at b017000 {
+ status = "ok";
+ };
};
};
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index e44f5b6..00a5e9e 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -171,5 +171,13 @@
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
};
+
+ watchdog at b017000 {
+ compatible = "qcom,kpss-standalone";
+ reg = <0xb017000 0x40>;
+ clocks = <&sleep_clk>;
+ timeout-sec = <10>;
+ status = "disabled";
+ };
};
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 11/17] qcom: ipq4019: add support for reset via qcom,ps-hold
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
2016-03-23 22:05 ` [PATCH 10/17] qcom: ipq4019: add watchdog node to ipq4019 SoC and DK01 device tree Matthew McClintock
@ 2016-03-23 22:05 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 12/17] qcom: ipq4019: add spi node to ipq4019 SoC and DK01 device tree Matthew McClintock
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
To: linux-arm-kernel
This will allow these types of boards to be rebooted.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 00a5e9e..acb851d 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -179,5 +179,10 @@
timeout-sec = <10>;
status = "disabled";
};
+
+ restart at 4ab000 {
+ compatible = "qcom,pshold";
+ reg = <0x4ab000 0x4>;
+ };
};
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 12/17] qcom: ipq4019: add spi node to ipq4019 SoC and DK01 device tree
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
2016-03-23 22:05 ` [PATCH 10/17] qcom: ipq4019: add watchdog node to ipq4019 SoC and DK01 device tree Matthew McClintock
2016-03-23 22:05 ` [PATCH 11/17] qcom: ipq4019: add support for reset via qcom,ps-hold Matthew McClintock
@ 2016-03-23 22:05 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 13/17] qcom: ipq4019: add i2c " Matthew McClintock
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
To: linux-arm-kernel
This will allow boards to enable the SPI bus
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 37 +++++++++++++++++++++++++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 18 +++++++++++++
2 files changed, 55 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 223da1a..21032a8 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -48,6 +48,43 @@
bias-disable;
};
};
+
+ spi_0_pins: spi_0_pinmux {
+ pinmux {
+ function = "blsp_spi0";
+ pins = "gpio55", "gpio56", "gpio57";
+ };
+ pinmux_cs {
+ function = "gpio";
+ pins = "gpio54";
+ };
+ pinconf {
+ pins = "gpio55", "gpio56", "gpio57";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio54";
+ drive-strength = <2>;
+ bias-disable;
+ output-high;
+ };
+ };
+ };
+
+ spi_0: spi at 78b5000 {
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ cs-gpios = <&tlmm 54 0>;
+
+ mx25l25635e at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "mx25l25635e";
+ spi-max-frequency = <24000000>;
+ };
};
serial at 78af000 {
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index acb851d..99e64f4 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -15,12 +15,18 @@
#include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Qualcomm Technologies, Inc. IPQ4019";
compatible = "qcom,ipq4019";
interrupt-parent = <&intc>;
+ aliases {
+ spi0 = &spi_0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -108,6 +114,18 @@
interrupts = <0 208 0>;
};
+ spi_0: spi at 78b5000 {
+ compatible = "qcom,spi-qup-v2.2.1";
+ reg = <0x78b5000 0x600>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
acc0: clock-controller at b088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 13/17] qcom: ipq4019: add i2c node to ipq4019 SoC and DK01 device tree
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
` (2 preceding siblings ...)
2016-03-23 22:05 ` [PATCH 12/17] qcom: ipq4019: add spi node to ipq4019 SoC and DK01 device tree Matthew McClintock
@ 2016-03-23 22:05 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 15/17] qcom: ipq4019: add cpu operating points for cpufreq support Matthew McClintock
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
To: linux-arm-kernel
This will allow boards to enable the I2C bus
CC: Sricharan R <srichara@qti.qualcomm.com>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 99e64f4..1937edf 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -25,6 +25,7 @@
aliases {
spi0 = &spi_0;
+ i2c0 = &i2c_0;
};
cpus {
@@ -126,6 +127,18 @@
status = "disabled";
};
+ i2c_0: i2c at 78b7000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x78b7000 0x6000>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
acc0: clock-controller at b088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 15/17] qcom: ipq4019: add cpu operating points for cpufreq support
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
` (3 preceding siblings ...)
2016-03-23 22:05 ` [PATCH 13/17] qcom: ipq4019: add i2c " Matthew McClintock
@ 2016-03-23 22:05 ` Matthew McClintock
2016-03-23 22:33 ` Stephen Boyd
2017-03-22 14:10 ` [15/17] " Sven Eckelmann
2016-03-23 22:05 ` [PATCH 16/17] qcom: ipq4019: add crypto nodes to ipq4019 SoC and DK01 device tree Matthew McClintock
2016-03-23 22:05 ` [PATCH 17/17] qcom: ipq4019: add DMA " Matthew McClintock
6 siblings, 2 replies; 9+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
To: linux-arm-kernel
This adds some operating points for cpu frequeny scaling
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 1937edf..db48fd3 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -40,6 +40,14 @@
reg = <0x0>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
+ operating-points = <
+ /* kHz uV (fixed) */
+ 48000 1100000
+ 200000 1100000
+ 500000 1100000
+ 666000 1100000
+ >;
+ clock-latency = <256000>;
};
cpu at 1 {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 16/17] qcom: ipq4019: add crypto nodes to ipq4019 SoC and DK01 device tree
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
` (4 preceding siblings ...)
2016-03-23 22:05 ` [PATCH 15/17] qcom: ipq4019: add cpu operating points for cpufreq support Matthew McClintock
@ 2016-03-23 22:05 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 17/17] qcom: ipq4019: add DMA " Matthew McClintock
6 siblings, 0 replies; 9+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
To: linux-arm-kernel
This adds the crypto nodes to the ipq4019 device tree, it also adds the
BAM node used by crypto as well which the driver currently requires to
operate properly
The crypto driver itself depends on some other patches to qcom_bam_dma
to function properly:
https://lkml.org/lkml/2015/12/1/113
CC: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 8 ++++++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 25 +++++++++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 21032a8..2c347ad 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -93,6 +93,14 @@
status = "ok";
};
+ cryptobam: dma at 8e04000 {
+ status = "ok";
+ };
+
+ crypto at 8e3a000 {
+ status = "ok";
+ };
+
watchdog at b017000 {
status = "ok";
};
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index db48fd3..3cd42c0 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -147,6 +147,31 @@
status = "disabled";
};
+
+ cryptobam: dma at 8e04000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x08e04000 0x20000>;
+ interrupts = <GIC_SPI 207 0>;
+ clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <1>;
+ qcom,controlled-remotely;
+ status = "disabled";
+ };
+
+ crypto at 8e3a000 {
+ compatible = "qcom,crypto-v5.1";
+ reg = <0x08e3a000 0x6000>;
+ clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
+ <&gcc GCC_CRYPTO_AXI_CLK>,
+ <&gcc GCC_CRYPTO_CLK>;
+ clock-names = "iface", "bus", "core";
+ dmas = <&cryptobam 2>, <&cryptobam 3>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
acc0: clock-controller at b088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 17/17] qcom: ipq4019: add DMA nodes to ipq4019 SoC and DK01 device tree
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
` (5 preceding siblings ...)
2016-03-23 22:05 ` [PATCH 16/17] qcom: ipq4019: add crypto nodes to ipq4019 SoC and DK01 device tree Matthew McClintock
@ 2016-03-23 22:05 ` Matthew McClintock
6 siblings, 0 replies; 9+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
To: linux-arm-kernel
This adds the blsp_dma node to the device tree and the required
properties for using DMA with serial
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 4 ++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 15 +++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 2c347ad..b9457dd2 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -72,6 +72,10 @@
};
};
+ blsp_dma: dma at 7884000 {
+ status = "ok";
+ };
+
spi_0: spi at 78b5000 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 3cd42c0..5c08d19 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -123,6 +123,17 @@
interrupts = <0 208 0>;
};
+ blsp_dma: dma at 7884000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x07884000 0x23000>;
+ interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ status = "disabled";
+ };
+
spi_0: spi at 78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x78b5000 0x600>;
@@ -224,6 +235,8 @@
clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
+ dmas = <&blsp_dma 1>, <&blsp_dma 0>;
+ dma-names = "rx", "tx";
};
serial at 78b0000 {
@@ -234,6 +247,8 @@
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
+ dmas = <&blsp_dma 3>, <&blsp_dma 2>;
+ dma-names = "rx", "tx";
};
watchdog at b017000 {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 9+ messages in thread