[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Alexandre TORGUE]

STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
This series:
 -enhance current stmmac driver to control it (code already
available) and adds basic glue for STM32F429 chip.
 -Enable basic Net config in kernel.

Changes since v5:
 -Fix typo in bindings documentation patch.
 -Change clocks names in stm32-dwmac glue driver / Documentation.
 -After rebase, stm32 ethernet node is now available. It has to be updated
according to new clocks names.

Changes since v4:
 -Fix dirty copy/past in bindings documentation patch.

Changes since v3:
 -Fix "tx-clk" and "rx-clk" as required clocks. Driver and bindings are
modified.

Changes since v2:
 -Fix alphabetic order in Kconfig and Makefile.
 -Improve code according to Joachim review.
 -Binding: remove useless entry.

Changes since v1:
 -Fix Kbuild issue in Kconfig.
 -Remove init/exit callbacks. Suspend/Resume and remove driver is no more
driven in stmmac_pltfr but directly in dwmac-stm32 glue driver.
 -Take into account Joachim review.

Regards.

Alexandre.

Alexandre TORGUE (6):
  net: ethernet: dwmac: add Ethernet glue logic for stm32 chip
  Documentation: Bindings: Add STM32 DWMAC glue
  net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP
  ARM: STM32: Enable Ethernet in stm32_defconfig
  ARM: dts: stm32f429: Align Ethernet node with new bindings properties
  ARM: dts: stm32f429: Update Ethernet node on Eval board

 .../devicetree/bindings/net/stm32-dwmac.txt        |  32 ++++
 arch/arm/boot/dts/stm32429i-eval.dts               |   4 +-
 arch/arm/boot/dts/stm32f429.dtsi                   |   6 +-
 arch/arm/configs/stm32_defconfig                   |   9 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig        |  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile       |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c  | 193 +++++++++++++++++++++
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   1 +
 8 files changed, 253 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/stm32-dwmac.txt
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

-- 
1.9.1

[RESEND PATCH v6 1/6] net: ethernet: dwmac: add Ethernet glue logic for stm32 chip

[Alexandre TORGUE]

stm324xx family chips support Synopsys MAC 3.510 IP.
This patch adds settings for logical glue logic:
-clocks
-mode selection MII or RMII.

Reviewed-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Tested-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index cec147d..235d679 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -104,6 +104,18 @@ config DWMAC_STI
 	  device driver. This driver is used on for the STi series
 	  SOCs GMAC ethernet controller.
 
+config DWMAC_STM32
+	tristate "STM32 DWMAC support"
+	default ARCH_STM32
+	depends on OF && HAS_IOMEM
+	select MFD_SYSCON
+	---help---
+	  Support for ethernet controller on STM32 SOCs.
+
+	  This selects STM32 SoC glue layer support for the stmmac
+	  device driver. This driver is used on for the STM32 series
+	  SOCs GMAC ethernet controller.
+
 config DWMAC_SUNXI
 	tristate "Allwinner GMAC support"
 	default ARCH_SUNXI
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 0fb362d..8828ada 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DWMAC_MESON)	+= dwmac-meson.o
 obj-$(CONFIG_DWMAC_ROCKCHIP)	+= dwmac-rk.o
 obj-$(CONFIG_DWMAC_SOCFPGA)	+= dwmac-socfpga.o
 obj-$(CONFIG_DWMAC_STI)		+= dwmac-sti.o
+obj-$(CONFIG_DWMAC_STM32)	+= dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)	+= dwmac-sunxi.o
 obj-$(CONFIG_DWMAC_GENERIC)	+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
new file mode 100644
index 0000000..79d8b92
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -0,0 +1,193 @@
+/*
+ * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
+ *
+ * Copyright (C) Alexandre Torgue 2015
+ * Author:  Alexandre Torgue <alexandre.torgue@gmail.com>
+ * License terms:  GNU General Public License (GPL), version 2
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_net.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/stmmac.h>
+
+#include "stmmac_platform.h"
+
+#define MII_PHY_SEL_MASK	BIT(23)
+
+struct stm32_dwmac {
+	struct clk *clk_tx;
+	struct clk *clk_rx;
+	u32 mode_reg;		/* MAC glue-logic mode register */
+	struct regmap *regmap;
+	u32 speed;
+};
+
+static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)
+{
+	struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+	u32 reg = dwmac->mode_reg;
+	u32 val;
+	int ret;
+
+	val = (plat_dat->interface == PHY_INTERFACE_MODE_MII) ? 0 : 1;
+	ret = regmap_update_bits(dwmac->regmap, reg, MII_PHY_SEL_MASK, val);
+	if (ret)
+		return ret;
+
+	ret = clk_prepare_enable(dwmac->clk_tx);
+	if (ret)
+		return ret;
+
+	ret = clk_prepare_enable(dwmac->clk_rx);
+	if (ret)
+		clk_disable_unprepare(dwmac->clk_tx);
+
+	return ret;
+}
+
+static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)
+{
+	clk_disable_unprepare(dwmac->clk_tx);
+	clk_disable_unprepare(dwmac->clk_rx);
+}
+
+static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
+				  struct device *dev)
+{
+	struct device_node *np = dev->of_node;
+	int err;
+
+	/*  Get TX/RX clocks */
+	dwmac->clk_tx = devm_clk_get(dev, "mac-clk-tx");
+	if (IS_ERR(dwmac->clk_tx)) {
+		dev_err(dev, "No tx clock provided...\n");
+		return PTR_ERR(dwmac->clk_tx);
+	}
+	dwmac->clk_rx = devm_clk_get(dev, "mac-clk-rx");
+	if (IS_ERR(dwmac->clk_rx)) {
+		dev_err(dev, "No rx clock provided...\n");
+		return PTR_ERR(dwmac->clk_rx);
+	}
+
+	/* Get mode register */
+	dwmac->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");
+	if (IS_ERR(dwmac->regmap))
+		return PTR_ERR(dwmac->regmap);
+
+	err = of_property_read_u32_index(np, "st,syscon", 1, &dwmac->mode_reg);
+	if (err)
+		dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);
+
+	return err;
+}
+
+static int stm32_dwmac_probe(struct platform_device *pdev)
+{
+	struct plat_stmmacenet_data *plat_dat;
+	struct stmmac_resources stmmac_res;
+	struct stm32_dwmac *dwmac;
+	int ret;
+
+	ret = stmmac_get_platform_resources(pdev, &stmmac_res);
+	if (ret)
+		return ret;
+
+	plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
+	if (IS_ERR(plat_dat))
+		return PTR_ERR(plat_dat);
+
+	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
+	if (!dwmac)
+		return -ENOMEM;
+
+	ret = stm32_dwmac_parse_data(dwmac, &pdev->dev);
+	if (ret) {
+		dev_err(&pdev->dev, "Unable to parse OF data\n");
+		return ret;
+	}
+
+	plat_dat->bsp_priv = dwmac;
+
+	ret = stm32_dwmac_init(plat_dat);
+	if (ret)
+		return ret;
+
+	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+	if (ret)
+		stm32_dwmac_clk_disable(dwmac);
+
+	return ret;
+}
+
+static int stm32_dwmac_remove(struct platform_device *pdev)
+{
+	struct net_device *ndev = platform_get_drvdata(pdev);
+	struct stmmac_priv *priv = netdev_priv(ndev);
+	int ret = stmmac_dvr_remove(&pdev->dev);
+
+	stm32_dwmac_clk_disable(priv->plat->bsp_priv);
+
+	return ret;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int stm32_dwmac_suspend(struct device *dev)
+{
+	struct net_device *ndev = dev_get_drvdata(dev);
+	struct stmmac_priv *priv = netdev_priv(ndev);
+	int ret;
+
+	ret = stmmac_suspend(dev);
+	stm32_dwmac_clk_disable(priv->plat->bsp_priv);
+
+	return ret;
+}
+
+static int stm32_dwmac_resume(struct device *dev)
+{
+	struct net_device *ndev = dev_get_drvdata(dev);
+	struct stmmac_priv *priv = netdev_priv(ndev);
+	int ret;
+
+	ret = stm32_dwmac_init(priv->plat);
+	if (ret)
+		return ret;
+
+	ret = stmmac_resume(dev);
+
+	return ret;
+}
+#endif /* CONFIG_PM_SLEEP */
+
+SIMPLE_DEV_PM_OPS(stm32_dwmac_pm_ops, stm32_dwmac_suspend, stm32_dwmac_resume);
+
+static const struct of_device_id stm32_dwmac_match[] = {
+	{ .compatible = "st,stm32-dwmac"},
+	{ }
+};
+MODULE_DEVICE_TABLE(of, stm32_dwmac_match);
+
+static struct platform_driver stm32_dwmac_driver = {
+	.probe  = stm32_dwmac_probe,
+	.remove = stm32_dwmac_remove,
+	.driver = {
+		.name           = "stm32-dwmac",
+		.pm		= &stm32_dwmac_pm_ops,
+		.of_match_table = stm32_dwmac_match,
+	},
+};
+module_platform_driver(stm32_dwmac_driver);
+
+MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@gmail.com>");
+MODULE_DESCRIPTION("STMicroelectronics MCU DWMAC Specific Glue layer");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

[RESEND PATCH v6 2/6] Documentation: Bindings: Add STM32 DWMAC glue

[Alexandre TORGUE]

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>

diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
new file mode 100644
index 0000000..c35afb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
@@ -0,0 +1,32 @@
+STMicroelectronics STM32 / MCU DWMAC glue layer controller
+
+This file documents platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+The device node has following properties.
+
+Required properties:
+- compatible:  Should be "st,stm32-dwmac" to select glue, and
+	       "snps,dwmac-3.50a" to select IP version.
+- clocks: Must contain a phandle for each entry in clock-names.
+- clock-names: Should be "stmmaceth" for the host clock.
+	       Should be "mac-clk-tx" for the MAC TX clock.
+	       Should be "mac-clk-rx" for the MAC RX clock.
+- st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
+	      encompases the glue register, and the offset of the control register.
+Example:
+
+	ethernet at 40028000 {
+		compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
+		status = "disabled";
+		reg = <0x40028000 0x8000>;
+		reg-names = "stmmaceth";
+		interrupts = <0 61 0>, <0 62 0>;
+		interrupt-names = "macirq", "eth_wake_irq";
+		clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
+		clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
+		st,syscon = <&syscfg 0x4>;
+		snps,pbl = <8>;
+		snps,mixed-burst;
+		dma-ranges;
+	};
-- 
1.9.1

[RESEND PATCH v6 3/6] net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP

[Alexandre TORGUE]

Adds support of Synopsys 3.50a MAC IP in stmmac driver.

Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Tested-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 409db91..7718247 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -262,6 +262,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
 	 * once needed on other platforms.
 	 */
 	if (of_device_is_compatible(np, "st,spear600-gmac") ||
+		of_device_is_compatible(np, "snps,dwmac-3.50a") ||
 		of_device_is_compatible(np, "snps,dwmac-3.70a") ||
 		of_device_is_compatible(np, "snps,dwmac")) {
 		/* Note that the max-frame-size parameter as defined in the
-- 
1.9.1

[RESEND PATCH v6 4/6] ARM: STM32: Enable Ethernet in stm32_defconfig

[Alexandre TORGUE]

Enable basic Ethernet support (IPV4) for stm32 defconfig.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>

diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index 1e5ec2a..719218b 100644
--- a/arch/arm/configs/stm32_defconfig
+++ b/arch/arm/configs/stm32_defconfig
@@ -33,11 +33,20 @@ CONFIG_XIP_PHYS_ADDR=0x08008000
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
 # CONFIG_COREDUMP is not set
+CONFIG_NET=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_IPV6 is not set
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_FW_LOADER is not set
 # CONFIG_BLK_DEV is not set
 CONFIG_EEPROM_93CX6=y
+CONFIG_NETDEVICES=y
+CONFIG_STMMAC_ETH=y
+# CONFIG_WLAN is not set
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
-- 
1.9.1

[RESEND PATCH v6 5/6] ARM: dts: stm32f429: Align Ethernet node with new bindings properties

[Alexandre TORGUE]

This patch aligns clocks names and node reference according to new
stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle
(indeed there is no need to add 0 as Ethernet instance as there is only
one IP in SOC).

Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 35df462..5995998 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -304,7 +304,7 @@
 				};
 			};
 
-			ethernet0_mii: mii at 0 {
+			ethernet_mii: mii at 0 {
 				pins {
 					pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
 						 <STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
@@ -363,13 +363,13 @@
 			st,mem2mem;
 		};
 
-		ethernet0: dwmac at 40028000 {
+		mac: ethernet at 40028000 {
 			compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
 			reg = <0x40028000 0x8000>;
 			reg-names = "stmmaceth";
 			interrupts = <61>, <62>;
 			interrupt-names = "macirq", "eth_wake_irq";
-			clock-names = "stmmaceth", "tx-clk", "rx-clk";
+			clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
 			clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
 			st,syscon = <&syscfg 0x4>;
 			snps,pbl = <8>;
-- 
1.9.1

[RESEND PATCH v6 6/6] ARM: dts: stm32f429: Update Ethernet node on Eval board

[Alexandre TORGUE]

Update new pinctrl phandle name and use new node name.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>

diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts
index 6bfc595..9a72445 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -94,9 +94,9 @@
 	clock-frequency = <25000000>;
 };
 
-&ethernet0 {
+&mac {
 	status = "okay";
-	pinctrl-0	= <&ethernet0_mii>;
+	pinctrl-0	= <&ethernet_mii>;
 	pinctrl-names	= "default";
 	phy-mode	= "mii-id";
 	mdio0 {
-- 
1.9.1

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[David Miller]

From: Alexandre TORGUE <alexandre.torgue@gmail.com>
Date: Mon,  9 May 2016 12:31:33 +0200

> STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
> This series:
>  -enhance current stmmac driver to control it (code already
> available) and adds basic glue for STM32F429 chip.
>  -Enable basic Net config in kernel.

I assume this will go via the ARM tree, for the networking bits:

Acked-by: David S. Miller <davem@davemloft.net>

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Maxime Coquelin]

Hi David,

2016-05-09 21:06 GMT+02:00 David Miller <davem@davemloft.net>:
> From: Alexandre TORGUE <alexandre.torgue@gmail.com>
> Date: Mon,  9 May 2016 12:31:33 +0200
>
>> STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
>> This series:
>>  -enhance current stmmac driver to control it (code already
>> available) and adds basic glue for STM32F429 chip.
>>  -Enable basic Net config in kernel.
>
> I assume this will go via the ARM tree, for the networking bits:
I would expect patches 1, 2 & 3 to got via your tree, to avoid conflicts.

> Acked-by: David S. Miller <davem@davemloft.net>

Thanks,
Maxime

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[David Miller]

From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Date: Tue, 17 May 2016 11:20:16 +0200

> Hi David,
> 
> 2016-05-09 21:06 GMT+02:00 David Miller <davem@davemloft.net>:
>> From: Alexandre TORGUE <alexandre.torgue@gmail.com>
>> Date: Mon,  9 May 2016 12:31:33 +0200
>>
>>> STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
>>> This series:
>>>  -enhance current stmmac driver to control it (code already
>>> available) and adds basic glue for STM32F429 chip.
>>>  -Enable basic Net config in kernel.
>>
>> I assume this will go via the ARM tree, for the networking bits:
> I would expect patches 1, 2 & 3 to got via your tree, to avoid conflicts.

I don't think putting them all via the ARM tree is going to create much
in the way of conflicts, and right now during the merge window offloading
that work from me would really help my backlog a lot.

Thanks.

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Maxime Coquelin]

2016-05-17 18:25 GMT+02:00 David Miller <davem@davemloft.net>:
> From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> Date: Tue, 17 May 2016 11:20:16 +0200
>
>> Hi David,
>>
>> 2016-05-09 21:06 GMT+02:00 David Miller <davem@davemloft.net>:
>>> From: Alexandre TORGUE <alexandre.torgue@gmail.com>
>>> Date: Mon,  9 May 2016 12:31:33 +0200
>>>
>>>> STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
>>>> This series:
>>>>  -enhance current stmmac driver to control it (code already
>>>> available) and adds basic glue for STM32F429 chip.
>>>>  -Enable basic Net config in kernel.
>>>
>>> I assume this will go via the ARM tree, for the networking bits:
>> I would expect patches 1, 2 & 3 to got via your tree, to avoid conflicts.
>
> I don't think putting them all via the ARM tree is going to create much
> in the way of conflicts, and right now during the merge window offloading
> that work from me would really help my backlog a lot.

Ok, I understand this is not the best time to pick it.

Arnd, Olof & Kevin, would you accept to pick the series in your tree?

Regards,
Maxime

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Arnd Bergmann]

On Wednesday 18 May 2016 09:48:53 Maxime Coquelin wrote:
> 2016-05-17 18:25 GMT+02:00 David Miller <davem@davemloft.net>:
> > From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> > Date: Tue, 17 May 2016 11:20:16 +0200
> >
> >> Hi David,
> >>
> >> 2016-05-09 21:06 GMT+02:00 David Miller <davem@davemloft.net>:
> >>> From: Alexandre TORGUE <alexandre.torgue@gmail.com>
> >>> Date: Mon,  9 May 2016 12:31:33 +0200
> >>>
> >>>> STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
> >>>> This series:
> >>>>  -enhance current stmmac driver to control it (code already
> >>>> available) and adds basic glue for STM32F429 chip.
> >>>>  -Enable basic Net config in kernel.
> >>>
> >>> I assume this will go via the ARM tree, for the networking bits:
> >> I would expect patches 1, 2 & 3 to got via your tree, to avoid conflicts.
> >
> > I don't think putting them all via the ARM tree is going to create much
> > in the way of conflicts, and right now during the merge window offloading
> > that work from me would really help my backlog a lot.
> 
> Ok, I understand this is not the best time to pick it.
> 
> Arnd, Olof & Kevin, would you accept to pick the series in your tree?
> 

It's too late for v4.7 for us too, please pick up the arch/arm patches
in your normal stm32 tree and send them to us along with any other changes
you may have, and resend the driver by itself to netdev time after the
merge window.

The binding document can go either way, with the dts changes or with
the driver. I see no dependencies between the patches, so we just need
to land them all in v4.8.

	Arnd

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Maxime Coquelin]

2016-05-18 11:31 GMT+02:00 Arnd Bergmann <arnd@arndb.de>:
> On Wednesday 18 May 2016 09:48:53 Maxime Coquelin wrote:
>> 2016-05-17 18:25 GMT+02:00 David Miller <davem@davemloft.net>:
>> > From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
>> > Date: Tue, 17 May 2016 11:20:16 +0200
>> >
>> >> Hi David,
>> >>
>> >> 2016-05-09 21:06 GMT+02:00 David Miller <davem@davemloft.net>:
>> >>> From: Alexandre TORGUE <alexandre.torgue@gmail.com>
>> >>> Date: Mon,  9 May 2016 12:31:33 +0200
>> >>>
>> >>>> STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
>> >>>> This series:
>> >>>>  -enhance current stmmac driver to control it (code already
>> >>>> available) and adds basic glue for STM32F429 chip.
>> >>>>  -Enable basic Net config in kernel.
>> >>>
>> >>> I assume this will go via the ARM tree, for the networking bits:
>> >> I would expect patches 1, 2 & 3 to got via your tree, to avoid conflicts.
>> >
>> > I don't think putting them all via the ARM tree is going to create much
>> > in the way of conflicts, and right now during the merge window offloading
>> > that work from me would really help my backlog a lot.
>>
>> Ok, I understand this is not the best time to pick it.
>>
>> Arnd, Olof & Kevin, would you accept to pick the series in your tree?
>>
>
> It's too late for v4.7 for us too, please pick up the arch/arm patches
> in your normal stm32 tree and send them to us along with any other changes
> you may have, and resend the driver by itself to netdev time after the
> merge window.
>
> The binding document can go either way, with the dts changes or with
> the driver. I see no dependencies between the patches, so we just need
> to land them all in v4.8.

Ok, this is good for me.
No problem to wait for v4.8.
I will take the arch/arm patches, and David the drivers/net/ ones once
v4.7-rc1 is out.

Thanks for your time,
Maxime

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Alexandre Torgue]

Hi David,

On 05/18/2016 11:49 AM, Maxime Coquelin wrote:
> 2016-05-18 11:31 GMT+02:00 Arnd Bergmann <arnd@arndb.de>:
>> On Wednesday 18 May 2016 09:48:53 Maxime Coquelin wrote:
>>> 2016-05-17 18:25 GMT+02:00 David Miller <davem@davemloft.net>:
>>>> From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
>>>> Date: Tue, 17 May 2016 11:20:16 +0200
>>>>
>>>>> Hi David,
>>>>>
>>>>> 2016-05-09 21:06 GMT+02:00 David Miller <davem@davemloft.net>:
>>>>>> From: Alexandre TORGUE <alexandre.torgue@gmail.com>
>>>>>> Date: Mon,  9 May 2016 12:31:33 +0200
>>>>>>
>>>>>>> STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
>>>>>>> This series:
>>>>>>>   -enhance current stmmac driver to control it (code already
>>>>>>> available) and adds basic glue for STM32F429 chip.
>>>>>>>   -Enable basic Net config in kernel.
>>>>>>
>>>>>> I assume this will go via the ARM tree, for the networking bits:
>>>>> I would expect patches 1, 2 & 3 to got via your tree, to avoid conflicts.
>>>>
>>>> I don't think putting them all via the ARM tree is going to create much
>>>> in the way of conflicts, and right now during the merge window offloading
>>>> that work from me would really help my backlog a lot.
>>>
>>> Ok, I understand this is not the best time to pick it.
>>>
>>> Arnd, Olof & Kevin, would you accept to pick the series in your tree?
>>>
>>
>> It's too late for v4.7 for us too, please pick up the arch/arm patches
>> in your normal stm32 tree and send them to us along with any other changes
>> you may have, and resend the driver by itself to netdev time after the
>> merge window.
>>
>> The binding document can go either way, with the dts changes or with
>> the driver. I see no dependencies between the patches, so we just need
>> to land them all in v4.8.
>
> Ok, this is good for me.
> No problem to wait for v4.8.
> I will take the arch/arm patches, and David the drivers/net/ ones once
> v4.7-rc1 is out.

According to this old discussion, could you please take driver patches
+ bindings one (patch 1/2/3) in your net-next tree ?
Do you need I resend them separately ?

Thanks in advance

Alex