From: p.zabel@pengutronix.de (Philipp Zabel)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 12/21] reset: uniphier: add core support for UniPhier reset driver
Date: Wed, 11 May 2016 12:34:34 +0200 [thread overview]
Message-ID: <1462962874.2924.20.camel@pengutronix.de> (raw)
In-Reply-To: <CAK7LNASpxbW81A7YGQuAqmBdBty4BC6Z8sko8YepXOPnVqSjAQ@mail.gmail.com>
Am Mittwoch, den 11.05.2016, 11:46 +0900 schrieb Masahiro Yamada:
> Hi Philipp,
>
>
> 2016-05-10 22:54 GMT+09:00 Philipp Zabel <p.zabel@pengutronix.de>:
> > Am Dienstag, den 10.05.2016, 18:50 +0900 schrieb Masahiro Yamada:
> > [...]
> >> +static int uniphier_reset_update(struct reset_controller_dev *rcdev,
> >> + unsigned long id, bool assert)
> >> +{
> >> + struct uniphier_reset_priv *priv = to_uniphier_reset_priv(rcdev);
> >> + const struct uniphier_reset_data *p;
> >> + bool handled = false;
> >> +
> >> + for (p = priv->data; p->id != UNIPHIER_RESET_ID_END; p++) {
> >> + unsigned int val;
> >> + int ret;
> >> +
> >> + if (p->id != id)
> >> + continue;
> >> +
> >> + val = p->deassert_val;
> >> + if (assert)
> >> + val = ~val;
> >> +
> >> + ret = regmap_write_bits(priv->regmap, p->reg, p->mask, val);
> >
> > What is the difference between mask and deassert_val? Couldn't you just
> > assign
> > val = assert ? 0 : p->mask;
> > ?
>
>
> I need to handle both active-high resets and active-low resets.
I see. I hadn't seen any active-high resets in your lists yet. If you
need them, you obviously can't simplify this much.
> I thought two ways to do that.
>
>
> [1] Have mask and a flag indicating active-low/active-high,
> like follows:
>
> if (flag & UNIPHIER_RST_ACTIVE_LOW)
> assert = !assert;
> val = assert ? 0 : p->mask;
>
> [2] Have mask and deassert_val as in this patch
>
> [1] cannot manage a case where one register contains
> active-low bits and active-high bits mixed in it.
>
>
>
> For example, let's say reset bits are BIT(1) and BIT(0).
>
> [2] can solve this case as follows:
>
> (a) If both bit1 and bit0 are active-high.
> .mask = BIT(1) | BIT(0);
> .deassert_val = 0;
>
> (b) If bit1 is active-high and bit0 is active-low
> .mask = BIT(1) | BIT(0);
> .deassert_val = BIT(0);
>
> (c) If bit1 is active-low and bit0 is active-high
> .mask = BIT(1) | BIT(0);
> .deassert_val = BIT(1);
>
> (d) If both bit1 and bit0 are active-low
> .mask = BIT(1) | BIT(0);
> .deassert_val = BIT(1) | BIT(0);
>
>
> I have not been hit by such a complicated case though.
In general it is a good idea not to add complexity for theoretical
cases, on the other hand [1] isn't really much less complex. Can I ask
you to invert the logic, though, and use assert_val instead?
regards
Philipp
next prev parent reply other threads:[~2016-05-11 10:34 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-10 9:50 [RFC PATCH 00/21] mfd, clock, reset: add UniPhier clock/reset driver support Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 01/21] mfd: uniphier: add UniPhier MFD driver Masahiro Yamada
2016-05-10 11:26 ` Lee Jones
2016-05-11 1:51 ` Masahiro Yamada
2016-05-11 7:38 ` Lee Jones
2016-05-10 9:50 ` [RFC PATCH 02/21] clk: uniphier: add core support for UniPhier clock driver Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 03/21] clk: uniphier: add clock driver for UniPhier PH1-LD4 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 04/21] clk: uniphier: add clock driver for UniPhier PH1-Pro4 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 05/21] clk: uniphier: add clock driver for UniPhier PH1-sLD8 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 06/21] clk: uniphier: add clock driver for UniPhier PH1-Pro5 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 07/21] clk: uniphier: add clock driver for UniPhier ProXstream2/PH1-LD6b SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 08/21] clk: uniphier: add clock driver for UniPhier PH1-LD11 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 09/21] clk: uniphier: add clock driver for UniPhier PH1-LD20 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 10/21] clk: uniphier: add clock driver for Media I/O block on UniPhier SoCs Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 11/21] clk: uniphier: add clock driver for Peripheral " Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 12/21] reset: uniphier: add core support for UniPhier reset driver Masahiro Yamada
2016-05-10 13:54 ` Philipp Zabel
2016-05-11 2:46 ` Masahiro Yamada
2016-05-11 10:34 ` Philipp Zabel [this message]
2016-05-10 9:50 ` [RFC PATCH 13/21] reset: uniphier: add reset driver for UniPhier PH1-LD4 SoC Masahiro Yamada
2016-05-10 12:25 ` Philipp Zabel
2016-05-11 2:52 ` Masahiro Yamada
2016-05-11 10:34 ` Philipp Zabel
2016-05-11 10:37 ` Philipp Zabel
2016-05-10 9:50 ` [RFC PATCH 14/21] reset: uniphier: add reset driver for UniPhier PH1-Pro4 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 15/21] reset: uniphier: add reset driver for UniPhier PH1-sLD8 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 16/21] reset: uniphier: add reset driver for UniPhier PH1-Pro5 SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 17/21] reset: uniphier: add reset driver for UniPhier ProXstream2/PH1-LD6b SoC Masahiro Yamada
2016-05-10 9:50 ` [RFC PATCH 18/21] reset: uniphier: add reset driver for UniPhier PH1-LD11 SoC Masahiro Yamada
2016-05-10 9:51 ` [RFC PATCH 19/21] reset: uniphier: add reset driver for UniPhier PH1-LD20 SoC Masahiro Yamada
2016-05-10 9:51 ` [RFC PATCH 20/21] reset: uniphier: add reset driver for Media I/O block on UniPhier SoCs Masahiro Yamada
2016-05-10 9:51 ` [RFC PATCH 21/21] reset: uniphier: add reset driver for Peripheral " Masahiro Yamada
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