* [PATCH] l2c: warn about misconfigured PL310 shared-override
@ 2016-05-31 14:43 Lucas Stach
2016-06-04 13:18 ` Fabio Estevam
0 siblings, 1 reply; 2+ messages in thread
From: Lucas Stach @ 2016-05-31 14:43 UTC (permalink / raw)
To: linux-arm-kernel
If the shared override enable bit in the PL310 aux ctrl register is
not set the L2 cache controller will render the system non-compliant
to the rules regarding mismatched memory aliases as specified in the
ARMv7 ARM RevC.
As this may lead to subtle corruptions when reading from a bufferable
alias, make sure to warn about this in the kernel log.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/mm/cache-l2x0.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index c61996c256cc..d2690f0d3cd0 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -815,6 +815,11 @@ static int __init __l2c_init(const struct l2c_init_data *data,
pr_warn("L2C: DT/platform modifies aux control register: 0x%08x -> 0x%08x\n",
old_aux, aux);
+ if (((cache_id & L2X0_CACHE_ID_PART_MASK) == L2X0_CACHE_ID_PART_L310) &&
+ !(aux & L2C_AUX_CTRL_SHARED_OVERRIDE))
+ pr_warn("L2C-310 shared attribute override enable not set, "
+ "system is non-compliant to ARM specified memory aliasing rules\n");
+
/* Determine the number of ways */
switch (cache_id & L2X0_CACHE_ID_PART_MASK) {
case L2X0_CACHE_ID_PART_L310:
--
2.8.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] l2c: warn about misconfigured PL310 shared-override
2016-05-31 14:43 [PATCH] l2c: warn about misconfigured PL310 shared-override Lucas Stach
@ 2016-06-04 13:18 ` Fabio Estevam
0 siblings, 0 replies; 2+ messages in thread
From: Fabio Estevam @ 2016-06-04 13:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Lucas,
On Tue, May 31, 2016 at 11:43 AM, Lucas Stach <l.stach@pengutronix.de> wrote:
> diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
> index c61996c256cc..d2690f0d3cd0 100644
> --- a/arch/arm/mm/cache-l2x0.c
> +++ b/arch/arm/mm/cache-l2x0.c
> @@ -815,6 +815,11 @@ static int __init __l2c_init(const struct l2c_init_data *data,
> pr_warn("L2C: DT/platform modifies aux control register: 0x%08x -> 0x%08x\n",
> old_aux, aux);
>
> + if (((cache_id & L2X0_CACHE_ID_PART_MASK) == L2X0_CACHE_ID_PART_L310) &&
> + !(aux & L2C_AUX_CTRL_SHARED_OVERRIDE))
> + pr_warn("L2C-310 shared attribute override enable not set, "
> + "system is non-compliant to ARM specified memory aliasing rules\n");
> +
Should something like "Make sure to set this bit in the bootloader" be
displayed? At least this would give some hint as to where the problem
needs to be fixed.
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