* [PATCH 1/2] ARM: dts: imx6sx: Fix PCIE support
@ 2016-06-08 0:10 Fabio Estevam
2016-06-08 0:10 ` [PATCH 2/2] ARM: dts: imx6sx-sdb: Add " Fabio Estevam
2016-06-08 7:33 ` [PATCH 1/2] ARM: dts: imx6sx: Fix " Igor Grinberg
0 siblings, 2 replies; 4+ messages in thread
From: Fabio Estevam @ 2016-06-08 0:10 UTC (permalink / raw)
To: linux-arm-kernel
From: Fabio Estevam <fabio.estevam@nxp.com>
Adjust the PCIE node in order to get it working with a mainline
kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/boot/dts/imx6sx.dtsi | 28 ++++++++++++++++------------
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 6a993bfda..6ffcc94 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1252,24 +1252,28 @@
pcie: pcie at 0x08000000 {
compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
- reg = <0x08ffc000 0x4000>; /* DBI */
+ reg = <0x08ffc000 0x4000>, <0x08f00000 0x80000>;
+ reg-names = "dbi", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- /* configuration space */
- ranges = <0x00000800 0 0x08f00000 0x08f00000 0 0x00080000
- /* downstream I/O */
- 0x81000000 0 0 0x08f80000 0 0x00010000
- /* non-prefetchable memory */
- 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
+ ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */
+ 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>;
- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,
- <&clks IMX6SX_CLK_PCIE_AXI>,
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6SX_CLK_PCIE_AXI>,
<&clks IMX6SX_CLK_LVDS1_OUT>,
+ <&clks IMX6SX_CLK_PCIE_REF_125M>,
<&clks IMX6SX_CLK_DISPLAY_AXI>;
- clock-names = "pcie_ref_125m", "pcie_axi",
- "lvds_gate", "display_axi";
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
+ pcie-phy-supply = <®_pcie>;
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] ARM: dts: imx6sx-sdb: Add PCIE support
2016-06-08 0:10 [PATCH 1/2] ARM: dts: imx6sx: Fix PCIE support Fabio Estevam
@ 2016-06-08 0:10 ` Fabio Estevam
2016-06-08 7:33 ` [PATCH 1/2] ARM: dts: imx6sx: Fix " Igor Grinberg
1 sibling, 0 replies; 4+ messages in thread
From: Fabio Estevam @ 2016-06-08 0:10 UTC (permalink / raw)
To: linux-arm-kernel
From: Fabio Estevam <fabio.estevam@nxp.com>
Enable PCIE support.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/boot/dts/imx6sx-sdb.dtsi | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index e5eafe4..2e04feb 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -129,6 +129,19 @@
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
};
+
+ reg_pci: regulator at 7 {
+ compatible = "regulator-fixed";
+ reg = <7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie_reg>;
+ regulator-name = "MPCIE_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ enable-active-high;
+ };
};
sound {
@@ -244,6 +257,13 @@
};
};
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
@@ -439,6 +459,18 @@
>;
};
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0
+ >;
+ };
+
+ pinctrl_pcie_reg: pciereggrp {
+ fsl,pins = <
+ MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0
+ >;
+ };
+
pinctrl_peri_3v3: peri3v3grp {
fsl,pins = <
MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 1/2] ARM: dts: imx6sx: Fix PCIE support
2016-06-08 0:10 [PATCH 1/2] ARM: dts: imx6sx: Fix PCIE support Fabio Estevam
2016-06-08 0:10 ` [PATCH 2/2] ARM: dts: imx6sx-sdb: Add " Fabio Estevam
@ 2016-06-08 7:33 ` Igor Grinberg
2016-06-12 13:48 ` Fabio Estevam
1 sibling, 1 reply; 4+ messages in thread
From: Igor Grinberg @ 2016-06-08 7:33 UTC (permalink / raw)
To: linux-arm-kernel
Hi Fabio,
On 06/08/2016 03:10 AM, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> Adjust the PCIE node in order to get it working with a mainline
> kernel.
The changes in the patch, do not look too self explanatory...
Can you please provide more details on what and why this should be done?
Thanks!
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> arch/arm/boot/dts/imx6sx.dtsi | 28 ++++++++++++++++------------
> 1 file changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index 6a993bfda..6ffcc94 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -1252,24 +1252,28 @@
>
> pcie: pcie at 0x08000000 {
> compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
> - reg = <0x08ffc000 0x4000>; /* DBI */
> + reg = <0x08ffc000 0x4000>, <0x08f00000 0x80000>;
> + reg-names = "dbi", "config";
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> - /* configuration space */
> - ranges = <0x00000800 0 0x08f00000 0x08f00000 0 0x00080000
> - /* downstream I/O */
> - 0x81000000 0 0 0x08f80000 0 0x00010000
> - /* non-prefetchable memory */
> - 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
> + ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */
> + 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
> num-lanes = <1>;
> - interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,
> - <&clks IMX6SX_CLK_PCIE_AXI>,
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi";
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 0x7>;
> + interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6SX_CLK_PCIE_AXI>,
> <&clks IMX6SX_CLK_LVDS1_OUT>,
> + <&clks IMX6SX_CLK_PCIE_REF_125M>,
> <&clks IMX6SX_CLK_DISPLAY_AXI>;
> - clock-names = "pcie_ref_125m", "pcie_axi",
> - "lvds_gate", "display_axi";
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
> + pcie-phy-supply = <®_pcie>;
> status = "disabled";
> };
> };
>
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2016-06-08 0:10 [PATCH 1/2] ARM: dts: imx6sx: Fix PCIE support Fabio Estevam
2016-06-08 0:10 ` [PATCH 2/2] ARM: dts: imx6sx-sdb: Add " Fabio Estevam
2016-06-08 7:33 ` [PATCH 1/2] ARM: dts: imx6sx: Fix " Igor Grinberg
2016-06-12 13:48 ` Fabio Estevam
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