From mboxrd@z Thu Jan 1 00:00:00 1970 From: juri.lelli@arm.com (Juri Lelli) Date: Wed, 15 Jun 2016 11:17:55 +0100 Subject: [PATCH v5 6/8] arm64, dts: add Juno r2 cpu capacity-dmips-mhz information In-Reply-To: <1465985877-18271-1-git-send-email-juri.lelli@arm.com> References: <1465985877-18271-1-git-send-email-juri.lelli@arm.com> Message-ID: <1465985877-18271-7-git-send-email-juri.lelli@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add Juno r2 cpu capacity-dmips-mhz bindings information. Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Catalin Marinas Cc: Will Deacon Cc: Liviu Dudau Cc: Sudeep Holla Cc: Arnd Bergmann Cc: Jon Medhurst Cc: Olof Johansson Cc: Robin Murphy Cc: devicetree at vger.kernel.org Signed-off-by: Juri Lelli --- Changes from v4: - new patch since Juno r2 dt has been merged --- arch/arm64/boot/dts/arm/juno-r2.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts index 88ecd61..823b614b 100644 --- a/arch/arm64/boot/dts/arm/juno-r2.dts +++ b/arch/arm64/boot/dts/arm/juno-r2.dts @@ -90,6 +90,7 @@ next-level-cache = <&A72_L2>; clocks = <&scpi_dvfs 0>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; }; A72_1: cpu at 1 { @@ -100,6 +101,7 @@ next-level-cache = <&A72_L2>; clocks = <&scpi_dvfs 0>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; }; A53_0: cpu at 100 { @@ -110,6 +112,7 @@ next-level-cache = <&A53_L2>; clocks = <&scpi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; }; A53_1: cpu at 101 { @@ -120,6 +123,7 @@ next-level-cache = <&A53_L2>; clocks = <&scpi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; }; A53_2: cpu at 102 { @@ -130,6 +134,7 @@ next-level-cache = <&A53_L2>; clocks = <&scpi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; }; A53_3: cpu at 103 { @@ -140,6 +145,7 @@ next-level-cache = <&A53_L2>; clocks = <&scpi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; }; A72_L2: l2-cache0 { -- 2.7.0