From mboxrd@z Thu Jan 1 00:00:00 1970 From: mirza.krak@gmail.com (Mirza Krak) Date: Tue, 19 Jul 2016 15:36:32 +0200 Subject: [RFC 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table In-Reply-To: <1468935397-11926-1-git-send-email-mirza.krak@gmail.com> References: <1468935397-11926-1-git-send-email-mirza.krak@gmail.com> Message-ID: <1468935397-11926-2-git-send-email-mirza.krak@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Mirza Krak Add TEGRA20_CLK_NOR to init tabel and set a "sane" default rate. Signed-off-by: Mirza Krak --- drivers/clk/tegra/clk-tegra20.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 837e5cb..aefc044 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -1047,6 +1047,7 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA20_CLK_SDMMC3, TEGRA20_CLK_PLL_P, 48000000, 0 }, { TEGRA20_CLK_SDMMC4, TEGRA20_CLK_PLL_P, 48000000, 0 }, { TEGRA20_CLK_SPI, TEGRA20_CLK_PLL_P, 20000000, 0 }, + { TEGRA20_CLK_NOR, TEGRA20_CLK_PLL_P, 86500000, 0 }, { TEGRA20_CLK_SBC1, TEGRA20_CLK_PLL_P, 100000000, 0 }, { TEGRA20_CLK_SBC2, TEGRA20_CLK_PLL_P, 100000000, 0 }, { TEGRA20_CLK_SBC3, TEGRA20_CLK_PLL_P, 100000000, 0 }, -- 2.1.4