[PATCH 0/4] clocksource: Add support for Aspeed timer

[PATCH 0/4] clocksource: Add support for Aspeed timer

[Joel Stanley]

Hello All,

This adds support for the Aspeed ast2400 and ast2500 families of BMC SoCs to
the moxart driver.

I've addressed the feedback from Daniel and spent a bit of time trying to
ensure the series makes sense.

I've not included a patch that renames the driver to fttmr010, from Faraday
Tech, as I wasn't sure if we had consensus. If you would prefer I do so then
let me know.

Cheers,

Joel

Joel Stanley (4):
  drivers/clocksouree/moxart: Add kbuild symbol
  drivers/clocksource/moxart: Refactor enable/disable
  drivers/clocksource/moxart: Use struct to hold state
  drivers/clocksource/moxart: Add Aspeed support

 .../bindings/timer/moxa,moxart-timer.txt           |   4 +-
 arch/arm/mach-moxart/Kconfig                       |   2 +-
 drivers/clocksource/Kconfig                        |   9 +
 drivers/clocksource/Makefile                       |   2 +-
 drivers/clocksource/moxart_timer.c                 | 191 ++++++++++++++-------
 5 files changed, 143 insertions(+), 65 deletions(-)

-- 
2.8.1

[PATCH 1/4] drivers/clocksouree/moxart: Add kbuild symbol

[Joel Stanley]

Add a Kconfig entry for this driver so other SoCs can select it. This
updates the moxart Kconfig in order to select the symbol.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/mach-moxart/Kconfig | 2 +-
 drivers/clocksource/Kconfig  | 9 +++++++++
 drivers/clocksource/Makefile | 2 +-
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-moxart/Kconfig b/arch/arm/mach-moxart/Kconfig
index 180d9d216719..505fab683b81 100644
--- a/arch/arm/mach-moxart/Kconfig
+++ b/arch/arm/mach-moxart/Kconfig
@@ -3,9 +3,9 @@ menuconfig ARCH_MOXART
 	depends on ARCH_MULTI_V4
 	select CPU_FA526
 	select ARM_DMA_MEM_BUFFERABLE
-	select CLKSRC_MMIO
 	select GENERIC_IRQ_CHIP
 	select ARCH_REQUIRE_GPIOLIB
+	select MOXART_TIMER
 	select PHYLIB if NETDEVICES
 	help
 	  Say Y here if you want to run your kernel on hardware with a
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c346be650892..9a54d1ce4ce7 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -411,4 +411,13 @@ config CLKSRC_ST_LPC
 	  Enable this option to use the Low Power controller timer
 	  as clocksource.
 
+config MOXART_TIMER
+	bool "Moxart timer" if COMPILE_TEST
+	depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
+	select CLKSRC_OF
+	select CLKSRC_MMIO
+	help
+	  Enables the support for the timer used in the Moxart and Aspeed
+	  system on chips.
+
 endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index dc2b8997f6e6..14fe8172c174 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_ORION_TIMER)	+= time-orion.o
 obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835_timer.o
 obj-$(CONFIG_ARCH_CLPS711X)	+= clps711x-timer.o
 obj-$(CONFIG_ARCH_ATLAS7)	+= timer-atlas7.o
-obj-$(CONFIG_ARCH_MOXART)	+= moxart_timer.o
+obj-$(CONFIG_MOXART_TIMER)	+= moxart_timer.o
 obj-$(CONFIG_ARCH_MXS)		+= mxs_timer.o
 obj-$(CONFIG_CLKSRC_PXA)	+= pxa_timer.o
 obj-$(CONFIG_ARCH_PRIMA2)	+= timer-prima2.o
-- 
2.8.1

[PATCH 2/4] drivers/clocksource/moxart: Refactor enable/disable

[Joel Stanley]

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 drivers/clocksource/moxart_timer.c | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c
index 19857af651c1..b00b2b21e8b3 100644
--- a/drivers/clocksource/moxart_timer.c
+++ b/drivers/clocksource/moxart_timer.c
@@ -58,15 +58,25 @@
 static void __iomem *base;
 static unsigned int clock_count_per_tick;
 
-static int moxart_shutdown(struct clock_event_device *evt)
+static inline void moxart_disable(struct clock_event_device *evt)
 {
 	writel(TIMER1_DISABLE, base + TIMER_CR);
+}
+
+static inline void moxart_enable(struct clock_event_device *evt)
+{
+	writel(TIMER1_ENABLE, base + TIMER_CR);
+}
+
+static int moxart_shutdown(struct clock_event_device *evt)
+{
+	moxart_disable(evt);
 	return 0;
 }
 
 static int moxart_set_oneshot(struct clock_event_device *evt)
 {
-	writel(TIMER1_DISABLE, base + TIMER_CR);
+	moxart_disable(evt);
 	writel(~0, base + TIMER1_BASE + REG_LOAD);
 	return 0;
 }
@@ -74,21 +84,21 @@ static int moxart_set_oneshot(struct clock_event_device *evt)
 static int moxart_set_periodic(struct clock_event_device *evt)
 {
 	writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
-	writel(TIMER1_ENABLE, base + TIMER_CR);
+	moxart_enable(evt);
 	return 0;
 }
 
 static int moxart_clkevt_next_event(unsigned long cycles,
-				    struct clock_event_device *unused)
+				    struct clock_event_device *evt)
 {
 	u32 u;
 
-	writel(TIMER1_DISABLE, base + TIMER_CR);
+	moxart_disable(evt);
 
 	u = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
 	writel(u, base + TIMER1_BASE + REG_MATCH1);
 
-	writel(TIMER1_ENABLE, base + TIMER_CR);
+	moxart_enable(evt);
 
 	return 0;
 }
-- 
2.8.1

[PATCH 2/4] drivers/clocksource/moxart: Refactor enable/disable

[Joel Stanley]

Hi Daniel,

Here's a commit message for this patch. If you'd prefer me to resend
the entire series with this included then I can do that.

This patch abstracts the enable and disable register writes into their
own functions in preparation for future changes to use SoC specific
values for the writes.

> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
>  drivers/clocksource/moxart_timer.c | 22 ++++++++++++++++------
>  1 file changed, 16 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c
> index 19857af651c1..b00b2b21e8b3 100644
> --- a/drivers/clocksource/moxart_timer.c
> +++ b/drivers/clocksource/moxart_timer.c
> @@ -58,15 +58,25 @@
>  static void __iomem *base;
>  static unsigned int clock_count_per_tick;
>
> -static int moxart_shutdown(struct clock_event_device *evt)
> +static inline void moxart_disable(struct clock_event_device *evt)
>  {
>         writel(TIMER1_DISABLE, base + TIMER_CR);
> +}
> +
> +static inline void moxart_enable(struct clock_event_device *evt)
> +{
> +       writel(TIMER1_ENABLE, base + TIMER_CR);
> +}
> +
> +static int moxart_shutdown(struct clock_event_device *evt)
> +{
> +       moxart_disable(evt);
>         return 0;
>  }
>
>  static int moxart_set_oneshot(struct clock_event_device *evt)
>  {
> -       writel(TIMER1_DISABLE, base + TIMER_CR);
> +       moxart_disable(evt);
>         writel(~0, base + TIMER1_BASE + REG_LOAD);
>         return 0;
>  }
> @@ -74,21 +84,21 @@ static int moxart_set_oneshot(struct clock_event_device *evt)
>  static int moxart_set_periodic(struct clock_event_device *evt)
>  {
>         writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
> -       writel(TIMER1_ENABLE, base + TIMER_CR);
> +       moxart_enable(evt);
>         return 0;
>  }
>
>  static int moxart_clkevt_next_event(unsigned long cycles,
> -                                   struct clock_event_device *unused)
> +                                   struct clock_event_device *evt)
>  {
>         u32 u;
>
> -       writel(TIMER1_DISABLE, base + TIMER_CR);
> +       moxart_disable(evt);
>
>         u = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
>         writel(u, base + TIMER1_BASE + REG_MATCH1);
>
> -       writel(TIMER1_ENABLE, base + TIMER_CR);
> +       moxart_enable(evt);
>
>         return 0;
>  }
> --
> 2.8.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 2/4] drivers/clocksource/moxart: Refactor enable/disable

[Daniel Lezcano]

On Tue, May 10, 2016 at 08:36:50PM +0930, Joel Stanley wrote:
> Hi Daniel,
> 
> Here's a commit message for this patch. If you'd prefer me to resend
> the entire series with this included then I can do that.

No, it is ok (except if there are comments on the patches before I merge 
them).
 
> This patch abstracts the enable and disable register writes into their
> own functions in preparation for future changes to use SoC specific
> values for the writes.

Thanks !

  -- Daniel

[PATCH 2/4] drivers/clocksource/moxart: Refactor enable/disable

[Joel Stanley]

Hello Daniel,

On Tue, May 10, 2016 at 10:34 PM, Daniel Lezcano
<daniel.lezcano@linaro.org> wrote:
> On Tue, May 10, 2016 at 08:36:50PM +0930, Joel Stanley wrote:
>> Hi Daniel,
>>
>> Here's a commit message for this patch. If you'd prefer me to resend
>> the entire series with this included then I can do that.
>
> No, it is ok (except if there are comments on the patches before I merge
> them).

I couldn't find this in your tree. Any chance I could get it merged now?

Cheers,

Joel

>
>> This patch abstracts the enable and disable register writes into their
>> own functions in preparation for future changes to use SoC specific
>> values for the writes.

[PATCH 2/4] drivers/clocksource/moxart: Refactor enable/disable

[Daniel Lezcano]

On Wed, Jul 20, 2016 at 02:47:15PM +0930, Joel Stanley wrote:
> Hello Daniel,
> 
> On Tue, May 10, 2016 at 10:34 PM, Daniel Lezcano
> <daniel.lezcano@linaro.org> wrote:
> > On Tue, May 10, 2016 at 08:36:50PM +0930, Joel Stanley wrote:
> >> Hi Daniel,
> >>
> >> Here's a commit message for this patch. If you'd prefer me to resend
> >> the entire series with this included then I can do that.
> >
> > No, it is ok (except if there are comments on the patches before I merge
> > them).
> 
> I couldn't find this in your tree. Any chance I could get it merged now?

Hi Joel,

actually I forgot to include your patchset which is no longer applying 
correctly and the conflicts are not trivials (easy but not trivial). It is a 
bit late to ask for a last minute pull. Sorry for that.

Please respin and resend your patchset, I will include it in my tree 
immediately so that won't happen again. The patch 1/4 is no longer needed.

If there is a really urgent need of this series, please let us know and 
Thomas can take a decision accordingly.

  -- Daniel

[PATCH 2/4] drivers/clocksource/moxart: Refactor enable/disable

[Benjamin Herrenschmidt]

On Wed, 2016-07-20 at 10:14 +0200, Daniel Lezcano wrote:
> 
> actually I forgot to include your patchset which is no longer applying?
> correctly and the conflicts are not trivials (easy but not trivial). It is a?
> bit late to ask for a last minute pull. Sorry for that.
> 
> Please respin and resend your patchset, I will include it in my tree?
> immediately so that won't happen again. The patch 1/4 is no longer needed.
> 
> If there is a really urgent need of this series, please let us know and?
> Thomas can take a decision accordingly.

I think all the other bits to have basic support for the Aspeed SoC are
in except this one, so it would be nice for this to make the merge
window...

Cheers,
Ben.

[PATCH 3/4] drivers/clocksource/moxart: Use struct to hold state

[Joel Stanley]

Add a struct moxart_timer to hold the driver state, including the
irqaction and struct clock_event_device.

Most importantly this holds values for enabling and disabling the timer,
so future support can be added for devices that use different bits for
enable/disable.

In preparation for future hardware support we add a MOXART prefix to the
existing values.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 drivers/clocksource/moxart_timer.c | 143 ++++++++++++++++++++++---------------
 1 file changed, 84 insertions(+), 59 deletions(-)

diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c
index b00b2b21e8b3..d17e3eface87 100644
--- a/drivers/clocksource/moxart_timer.c
+++ b/drivers/clocksource/moxart_timer.c
@@ -21,6 +21,7 @@
 #include <linux/io.h>
 #include <linux/clocksource.h>
 #include <linux/bitops.h>
+#include <linux/slab.h>
 
 #define TIMER1_BASE		0x00
 #define TIMER2_BASE		0x10
@@ -36,36 +37,51 @@
 #define TIMER_INTR_MASK		0x38
 
 /*
- * TIMER_CR flags:
+ * Moxart TIMER_CR flags:
  *
- * TIMEREG_CR_*_CLOCK	0: PCLK, 1: EXT1CLK
- * TIMEREG_CR_*_INT	overflow interrupt enable bit
+ * MOXART_CR_*_CLOCK	0: PCLK, 1: EXT1CLK
+ * MOXART_CR_*_INT	overflow interrupt enable bit
  */
-#define TIMEREG_CR_1_ENABLE	BIT(0)
-#define TIMEREG_CR_1_CLOCK	BIT(1)
-#define TIMEREG_CR_1_INT	BIT(2)
-#define TIMEREG_CR_2_ENABLE	BIT(3)
-#define TIMEREG_CR_2_CLOCK	BIT(4)
-#define TIMEREG_CR_2_INT	BIT(5)
-#define TIMEREG_CR_3_ENABLE	BIT(6)
-#define TIMEREG_CR_3_CLOCK	BIT(7)
-#define TIMEREG_CR_3_INT	BIT(8)
-#define TIMEREG_CR_COUNT_UP	BIT(9)
-
-#define TIMER1_ENABLE		(TIMEREG_CR_2_ENABLE | TIMEREG_CR_1_ENABLE)
-#define TIMER1_DISABLE		(TIMEREG_CR_2_ENABLE)
-
-static void __iomem *base;
-static unsigned int clock_count_per_tick;
+#define MOXART_CR_1_ENABLE	BIT(0)
+#define MOXART_CR_1_CLOCK	BIT(1)
+#define MOXART_CR_1_INT	BIT(2)
+#define MOXART_CR_2_ENABLE	BIT(3)
+#define MOXART_CR_2_CLOCK	BIT(4)
+#define MOXART_CR_2_INT	BIT(5)
+#define MOXART_CR_3_ENABLE	BIT(6)
+#define MOXART_CR_3_CLOCK	BIT(7)
+#define MOXART_CR_3_INT	BIT(8)
+#define MOXART_CR_COUNT_UP	BIT(9)
+
+#define MOXART_TIMER1_ENABLE	(MOXART_CR_2_ENABLE | MOXART_CR_1_ENABLE)
+#define MOXART_TIMER1_DISABLE	(MOXART_CR_2_ENABLE)
+
+struct moxart_timer {
+	void __iomem *base;
+	unsigned int t1_disable_val;
+	unsigned int t1_enable_val;
+	unsigned int count_per_tick;
+	struct clock_event_device clkevt;
+	struct irqaction act;
+};
+
+static inline struct moxart_timer *to_moxart(struct clock_event_device *evt)
+{
+	return container_of(evt, struct moxart_timer, clkevt);
+}
 
 static inline void moxart_disable(struct clock_event_device *evt)
 {
-	writel(TIMER1_DISABLE, base + TIMER_CR);
+	struct moxart_timer *timer = to_moxart(evt);
+
+	writel(timer->t1_disable_val, timer->base + TIMER_CR);
 }
 
 static inline void moxart_enable(struct clock_event_device *evt)
 {
-	writel(TIMER1_ENABLE, base + TIMER_CR);
+	struct moxart_timer *timer = to_moxart(evt);
+
+	writel(timer->t1_enable_val, timer->base + TIMER_CR);
 }
 
 static int moxart_shutdown(struct clock_event_device *evt)
@@ -77,13 +93,17 @@ static int moxart_shutdown(struct clock_event_device *evt)
 static int moxart_set_oneshot(struct clock_event_device *evt)
 {
 	moxart_disable(evt);
-	writel(~0, base + TIMER1_BASE + REG_LOAD);
+	writel(~0, to_moxart(evt)->base + TIMER1_BASE + REG_LOAD);
 	return 0;
 }
 
 static int moxart_set_periodic(struct clock_event_device *evt)
 {
-	writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
+	struct moxart_timer *timer = to_moxart(evt);
+
+	moxart_disable(evt);
+	writel(timer->count_per_tick, timer->base + TIMER1_BASE + REG_LOAD);
+	writel(0, timer->base + TIMER1_BASE + REG_MATCH1);
 	moxart_enable(evt);
 	return 0;
 }
@@ -91,30 +111,19 @@ static int moxart_set_periodic(struct clock_event_device *evt)
 static int moxart_clkevt_next_event(unsigned long cycles,
 				    struct clock_event_device *evt)
 {
+	struct moxart_timer *timer = to_moxart(evt);
 	u32 u;
 
 	moxart_disable(evt);
 
-	u = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
-	writel(u, base + TIMER1_BASE + REG_MATCH1);
+	u = readl(timer->base + TIMER1_BASE + REG_COUNT) - cycles;
+	writel(u, timer->base + TIMER1_BASE + REG_MATCH1);
 
 	moxart_enable(evt);
 
 	return 0;
 }
 
-static struct clock_event_device moxart_clockevent = {
-	.name			= "moxart_timer",
-	.rating			= 200,
-	.features		= CLOCK_EVT_FEAT_PERIODIC |
-				  CLOCK_EVT_FEAT_ONESHOT,
-	.set_state_shutdown	= moxart_shutdown,
-	.set_state_periodic	= moxart_set_periodic,
-	.set_state_oneshot	= moxart_set_oneshot,
-	.tick_resume		= moxart_set_oneshot,
-	.set_next_event		= moxart_clkevt_next_event,
-};
-
 static irqreturn_t moxart_timer_interrupt(int irq, void *dev_id)
 {
 	struct clock_event_device *evt = dev_id;
@@ -122,49 +131,66 @@ static irqreturn_t moxart_timer_interrupt(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-static struct irqaction moxart_timer_irq = {
-	.name		= "moxart-timer",
-	.flags		= IRQF_TIMER,
-	.handler	= moxart_timer_interrupt,
-	.dev_id		= &moxart_clockevent,
-};
-
 static void __init moxart_timer_init(struct device_node *node)
 {
 	int ret, irq;
 	unsigned long pclk;
 	struct clk *clk;
+	struct moxart_timer *timer;
+
+	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
+	if (!timer)
+		panic("Can't allocate timer struct\n");
 
-	base = of_iomap(node, 0);
-	if (!base)
+	timer->base = of_iomap(node, 0);
+	if (!timer->base)
 		panic("%s: of_iomap failed\n", node->full_name);
 
 	irq = irq_of_parse_and_map(node, 0);
 	if (irq <= 0)
 		panic("%s: irq_of_parse_and_map failed\n", node->full_name);
 
-	ret = setup_irq(irq, &moxart_timer_irq);
-	if (ret)
-		panic("%s: setup_irq failed\n", node->full_name);
-
 	clk = of_clk_get(node, 0);
 	if (IS_ERR(clk))
 		panic("%s: of_clk_get failed\n", node->full_name);
 
 	pclk = clk_get_rate(clk);
 
-	if (clocksource_mmio_init(base + TIMER2_BASE + REG_COUNT,
+	if (of_device_is_compatible(node, "moxa,moxart-timer")) {
+		timer->t1_enable_val = MOXART_TIMER1_ENABLE;
+		timer->t1_disable_val = MOXART_TIMER1_DISABLE;
+	} else
+		panic("%s: unknown platform\n", node->full_name);
+
+	timer->count_per_tick = DIV_ROUND_CLOSEST(pclk, HZ);
+
+	timer->clkevt.name = node->name;
+	timer->clkevt.rating = 200;
+	timer->clkevt.features = CLOCK_EVT_FEAT_PERIODIC |
+					CLOCK_EVT_FEAT_ONESHOT;
+	timer->clkevt.set_state_shutdown = moxart_shutdown;
+	timer->clkevt.set_state_periodic = moxart_set_periodic;
+	timer->clkevt.set_state_oneshot = moxart_set_oneshot;
+	timer->clkevt.tick_resume = moxart_set_oneshot;
+	timer->clkevt.set_next_event = moxart_clkevt_next_event;
+	timer->clkevt.cpumask = cpumask_of(0);
+	timer->clkevt.irq = irq;
+	timer->act.name = node->name;
+	timer->act.flags = IRQF_TIMER;
+	timer->act.handler = moxart_timer_interrupt;
+	timer->act.dev_id = &timer->clkevt;
+
+	if (clocksource_mmio_init(timer->base + TIMER2_BASE + REG_COUNT,
 				  "moxart_timer", pclk, 200, 32,
 				  clocksource_mmio_readl_down))
 		panic("%s: clocksource_mmio_init failed\n", node->full_name);
 
-	clock_count_per_tick = DIV_ROUND_CLOSEST(pclk, HZ);
-
-	writel(~0, base + TIMER2_BASE + REG_LOAD);
-	writel(TIMEREG_CR_2_ENABLE, base + TIMER_CR);
+	ret = setup_irq(irq, &timer->act);
+	if (ret)
+		panic("%s: setup_irq failed\n", node->full_name);
 
-	moxart_clockevent.cpumask = cpumask_of(0);
-	moxart_clockevent.irq = irq;
+	writel(~0, timer->base + TIMER2_BASE + REG_LOAD);
+	writel(timer->t1_disable_val, timer->base + TIMER_CR);
 
 	/*
 	 * documentation is not publicly available:
@@ -172,7 +198,6 @@ static void __init moxart_timer_init(struct device_node *node)
 	 * max_delta 0xfffffffe should be ok because count
 	 * register size is u32
 	 */
-	clockevents_config_and_register(&moxart_clockevent, pclk,
-					0x4, 0xfffffffe);
+	clockevents_config_and_register(&timer->clkevt, pclk, 0x4, 0xfffffffe);
 }
 CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", moxart_timer_init);
-- 
2.8.1

[PATCH 4/4] drivers/clocksource/moxart: Add Aspeed support

[Joel Stanley]

The Aspeed SoC has timer IP with a very similar register layout to the
moxart timer. This patch adds support for the fourth and fifth gen
aspeed SoCs, and has been tested on the ast2400 and ast2500.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 .../bindings/timer/moxa,moxart-timer.txt           |  4 ++-
 drivers/clocksource/moxart_timer.c                 | 32 ++++++++++++++++++++++
 2 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt b/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt
index da2d510cae47..e207c11630af 100644
--- a/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt
+++ b/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt
@@ -2,7 +2,9 @@ MOXA ART timer
 
 Required properties:
 
-- compatible : Must be "moxa,moxart-timer"
+- compatible : Must be one of:
+ 	- "moxa,moxart-timer"
+ 	- "aspeed,ast2400-timer"
 - reg : Should contain registers location and length
 - interrupts : Should contain the timer interrupt number
 - clocks : Should contain phandle for the clock that drives the counter
diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c
index d17e3eface87..83ffa2727699 100644
--- a/drivers/clocksource/moxart_timer.c
+++ b/drivers/clocksource/moxart_timer.c
@@ -56,6 +56,23 @@
 #define MOXART_TIMER1_ENABLE	(MOXART_CR_2_ENABLE | MOXART_CR_1_ENABLE)
 #define MOXART_TIMER1_DISABLE	(MOXART_CR_2_ENABLE)
 
+/*
+ * The ASpeed variant of the IP block has a different layout
+ * for the control register
+ */
+#define ASPEED_CR_1_ENABLE	BIT(0)
+#define ASPEED_CR_1_CLOCK	BIT(1)
+#define ASPEED_CR_1_INT		BIT(2)
+#define ASPEED_CR_2_ENABLE	BIT(4)
+#define ASPEED_CR_2_CLOCK	BIT(5)
+#define ASPEED_CR_2_INT		BIT(6)
+#define ASPEED_CR_3_ENABLE	BIT(8)
+#define ASPEED_CR_3_CLOCK	BIT(9)
+#define ASPEED_CR_3_INT		BIT(10)
+
+#define ASPEED_TIMER1_ENABLE   (ASPEED_CR_2_ENABLE | ASPEED_CR_1_ENABLE)
+#define ASPEED_TIMER1_DISABLE  (ASPEED_CR_2_ENABLE)
+
 struct moxart_timer {
 	void __iomem *base;
 	unsigned int t1_disable_val;
@@ -159,6 +176,9 @@ static void __init moxart_timer_init(struct device_node *node)
 	if (of_device_is_compatible(node, "moxa,moxart-timer")) {
 		timer->t1_enable_val = MOXART_TIMER1_ENABLE;
 		timer->t1_disable_val = MOXART_TIMER1_DISABLE;
+	} else if (of_device_is_compatible(node, "aspeed,ast2400-timer")) {
+		timer->t1_enable_val = ASPEED_TIMER1_ENABLE;
+		timer->t1_disable_val = ASPEED_TIMER1_DISABLE;
 	} else
 		panic("%s: unknown platform\n", node->full_name);
 
@@ -189,6 +209,17 @@ static void __init moxart_timer_init(struct device_node *node)
 	if (ret)
 		panic("%s: setup_irq failed\n", node->full_name);
 
+	/* Clear match registers */
+	writel(0, timer->base + TIMER1_BASE + REG_MATCH1);
+	writel(0, timer->base + TIMER1_BASE + REG_MATCH2);
+	writel(0, timer->base + TIMER2_BASE + REG_MATCH1);
+	writel(0, timer->base + TIMER2_BASE + REG_MATCH2);
+
+	/*
+	 * Start timer 2 rolling as our main wall clock source, keep timer 1
+	 * disabled
+	 */
+	writel(0, timer->base + TIMER_CR);
 	writel(~0, timer->base + TIMER2_BASE + REG_LOAD);
 	writel(timer->t1_disable_val, timer->base + TIMER_CR);
 
@@ -201,3 +232,4 @@ static void __init moxart_timer_init(struct device_node *node)
 	clockevents_config_and_register(&timer->clkevt, pclk, 0x4, 0xfffffffe);
 }
 CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", moxart_timer_init);
+CLOCKSOURCE_OF_DECLARE(aspeed, "aspeed,ast2400-timer", moxart_timer_init);
-- 
2.8.1

[PATCH 4/4] drivers/clocksource/moxart: Add Aspeed support

[Rob Herring]

On Mon, May 09, 2016 at 10:02:49PM +0930, Joel Stanley wrote:
> The Aspeed SoC has timer IP with a very similar register layout to the
> moxart timer. This patch adds support for the fourth and fifth gen
> aspeed SoCs, and has been tested on the ast2400 and ast2500.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
>  .../bindings/timer/moxa,moxart-timer.txt           |  4 ++-
>  drivers/clocksource/moxart_timer.c                 | 32 ++++++++++++++++++++++
>  2 files changed, 35 insertions(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 0/4] clocksource: Add support for Aspeed timer

[Daniel Lezcano]

On Mon, May 09, 2016 at 10:02:45PM +0930, Joel Stanley wrote:
> Hello All,
> 
> This adds support for the Aspeed ast2400 and ast2500 families of BMC SoCs to
> the moxart driver.
> 
> I've addressed the feedback from Daniel and spent a bit of time trying to
> ensure the series makes sense.
> 
> I've not included a patch that renames the driver to fttmr010, from Faraday
> Tech, as I wasn't sure if we had consensus. If you would prefer I do so then
> let me know.
> 
> Cheers,
> 
> Joel
> 
> Joel Stanley (4):
>   drivers/clocksouree/moxart: Add kbuild symbol
>   drivers/clocksource/moxart: Refactor enable/disable
>   drivers/clocksource/moxart: Use struct to hold state
>   drivers/clocksource/moxart: Add Aspeed support
> 
>  .../bindings/timer/moxa,moxart-timer.txt           |   4 +-
>  arch/arm/mach-moxart/Kconfig                       |   2 +-
>  drivers/clocksource/Kconfig                        |   9 +
>  drivers/clocksource/Makefile                       |   2 +-
>  drivers/clocksource/moxart_timer.c                 | 191 ++++++++++++++-------
>  5 files changed, 143 insertions(+), 65 deletions(-)

The changes look ok. Could you please reply to patch 2 with a changelog I 
can add.

Thanks.

  -- Daniel