From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 6/7] arm64: xen: Enable user access before a privcmd hvc call
Date: Fri, 12 Aug 2016 16:27:45 +0100 [thread overview]
Message-ID: <1471015666-23125-7-git-send-email-catalin.marinas@arm.com> (raw)
In-Reply-To: <1471015666-23125-1-git-send-email-catalin.marinas@arm.com>
Privcmd calls are issued by the userspace. The kernel needs to enable
access to TTBR0_EL1 as the hypervisor would issue stage 1 translations
to user memory via AT instructions. Since AT instructions are not
affected by the PAN bit (ARMv8.1), we only need the explicit
uaccess_enable/disable if the TTBR0 PAN option is enabled.
Cc: Julien Grall <julien.grall@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
arch/arm64/xen/hypercall.S | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S
index 329c8027b0a9..4c509f4f4dcc 100644
--- a/arch/arm64/xen/hypercall.S
+++ b/arch/arm64/xen/hypercall.S
@@ -91,6 +91,24 @@ ENTRY(privcmd_call)
mov x2, x3
mov x3, x4
mov x4, x5
+#ifdef CONFIG_ARM64_TTBR0_PAN
+ /*
+ * Privcmd calls are issued by the userspace. The kernel needs to
+ * enable access to TTBR0_EL1 as the hypervisor would issue stage 1
+ * translations to user memory via AT instructions. Since AT
+ * instructions are not affected by the PAN bit (ARMv8.1), we only
+ * need the explicit uaccess_enable/disable if the TTBR0 PAN option is
+ * enabled.
+ */
+ uaccess_enable x6, x7, x8
+#endif
hvc XEN_IMM
+
+#ifdef CONFIG_ARM64_TTBR0_PAN
+ /*
+ * Disable userspace access from kernel once the hyp call completed.
+ */
+ uaccess_disable x6
+#endif
ret
ENDPROC(privcmd_call);
next prev parent reply other threads:[~2016-08-12 15:27 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-12 15:27 [PATCH 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Catalin Marinas
2016-08-12 15:27 ` [PATCH 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Catalin Marinas
2016-08-12 15:27 ` [PATCH 2/7] arm64: Factor out TTBR0_EL1 setting into a specific asm macro Catalin Marinas
2016-08-12 15:27 ` [PATCH 3/7] arm64: Introduce uaccess_{disable, enable} functionality based on TTBR0_EL1 Catalin Marinas
2016-08-12 15:27 ` [PATCH 4/7] arm64: Disable TTBR0_EL1 during normal kernel execution Catalin Marinas
2016-08-15 11:18 ` Mark Rutland
2016-08-15 16:39 ` Catalin Marinas
2016-08-12 15:27 ` [PATCH 5/7] arm64: Handle faults caused by inadvertent user access with PAN enabled Catalin Marinas
2016-08-12 15:27 ` Catalin Marinas [this message]
2016-08-15 9:58 ` [PATCH 6/7] arm64: xen: Enable user access before a privcmd hvc call Julien Grall
2016-08-15 18:00 ` Stefano Stabellini
2016-08-12 15:27 ` [PATCH 7/7] arm64: Enable CONFIG_ARM64_TTBR0_PAN Catalin Marinas
2016-08-12 18:04 ` [PATCH 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Kees Cook
2016-08-12 18:22 ` Catalin Marinas
2016-08-13 9:13 ` [kernel-hardening] " Ard Biesheuvel
2016-08-15 9:48 ` Catalin Marinas
2016-08-15 9:58 ` Mark Rutland
2016-08-15 10:02 ` Ard Biesheuvel
2016-08-15 10:06 ` Mark Rutland
2016-08-15 10:10 ` Will Deacon
2016-08-15 10:15 ` Mark Rutland
2016-08-15 10:21 ` Will Deacon
2016-08-15 10:21 ` Ard Biesheuvel
2016-08-15 10:30 ` Will Deacon
2016-08-15 10:31 ` Ard Biesheuvel
2016-08-15 10:37 ` Will Deacon
2016-08-15 10:43 ` Ard Biesheuvel
2016-08-15 10:52 ` Catalin Marinas
2016-08-15 10:56 ` Ard Biesheuvel
2016-08-15 11:02 ` Will Deacon
2016-08-15 16:13 ` Catalin Marinas
2016-08-15 19:04 ` Ard Biesheuvel
2016-08-15 11:00 ` Will Deacon
2016-08-15 10:30 ` Mark Rutland
2016-08-15 10:08 ` Will Deacon
2016-08-26 15:39 ` David Brown
2016-08-26 17:24 ` Catalin Marinas
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