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From: hs.liao@mediatek.com (HS Liao)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v13 1/4] dt-bindings: soc: Add documentation for the MediaTek GCE unit
Date: Wed, 24 Aug 2016 11:27:29 +0800	[thread overview]
Message-ID: <1472009252-1074-2-git-send-email-hs.liao@mediatek.com> (raw)
In-Reply-To: <1472009252-1074-1-git-send-email-hs.liao@mediatek.com>

This adds documentation for the MediaTek Global Command Engine (GCE) unit
found in MT8173 SoCs.

Signed-off-by: HS Liao <hs.liao@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/soc/mediatek/gce.txt       | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/mediatek/gce.txt

diff --git a/Documentation/devicetree/bindings/soc/mediatek/gce.txt b/Documentation/devicetree/bindings/soc/mediatek/gce.txt
new file mode 100644
index 0000000..55c4105
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/gce.txt
@@ -0,0 +1,44 @@
+MediaTek GCE
+===============
+
+The Global Command Engine (GCE) is used to help read/write registers with
+critical time limitation, such as updating display configuration during the
+vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
+
+CMDQ driver uses mailbox framework for communication. Please refer to
+../../mailbox/mailbox.txt for generic information about mailbox device-tree
+bindings.
+
+Required properties:
+- compatible: Must be "mediatek,mt8173-gce"
+- reg: Address range of the GCE unit
+- interrupts: The interrupt signal from the GCE block
+- clock: Clocks according to the common clock binding
+- clock-names: Must be "gce" to stand for GCE clock
+- #mbox-cells: Should be 2
+
+Required properties for a client device:
+- mboxes: client use mailbox to communicate with GCE, it should have this
+  property and list of phandle, mailbox channel specifiers, and atomic
+  execution flag.
+
+Example:
+
+	gce: gce at 10212000 {
+		compatible = "mediatek,mt8173-gce";
+		reg = <0 0x10212000 0 0x1000>;
+		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&infracfg CLK_INFRA_GCE>;
+		clock-names = "gce";
+
+		#mbox-cells = <2>;
+	};
+
+Example for a client device:
+
+	mmsys: clock-controller at 14000000 {
+		compatible = "mediatek,mt8173-mmsys";
+		mboxes = <&gce 0 1 /* main display with atomic execution */
+			  &gce 1 1>; /* sub display with atomic execution */
+		...
+	};
-- 
1.9.1

  reply	other threads:[~2016-08-24  3:27 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-24  3:27 [PATCH v13 0/4] Mediatek MT8173 CMDQ support HS Liao
2016-08-24  3:27 ` HS Liao [this message]
2016-08-24  3:27 ` [PATCH v13 2/4] CMDQ: Mediatek CMDQ driver HS Liao
2016-08-24  3:27 ` [PATCH v13 3/4] arm64: dts: mt8173: Add GCE node HS Liao
2016-08-24  3:27 ` [PATCH v13 4/4] CMDQ: save more energy in idle HS Liao
2016-08-24 11:00 ` [PATCH v13 0/4] Mediatek MT8173 CMDQ support Matthias Brugger
2016-08-25 13:37   ` Horng-Shyang Liao
2016-08-25 13:42     ` Jassi Brar
2016-08-31  8:13       ` Horng-Shyang Liao
2016-08-31  8:45         ` Jassi Brar
2016-09-02  8:50           ` Horng-Shyang Liao

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