* [PATCHv2] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
@ 2016-10-26 18:05 dinguyen at opensource.altera.com
2016-10-27 7:06 ` Steffen Trumtrar
0 siblings, 1 reply; 3+ messages in thread
From: dinguyen at opensource.altera.com @ 2016-10-26 18:05 UTC (permalink / raw)
To: linux-arm-kernel
From: Dinh Nguyen <dinguyen@opensource.altera.com>
Enable the QSPI node and add the flash chip.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Remove partition entries for the SoCKIT
---
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
index 02e22f5..2ce6736 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
@@ -175,6 +175,27 @@
status = "okay";
};
+&qspi {
+ status = "okay";
+
+ flash: flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q256a";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+
+ m25p,fast-read;
+ cdns,page-size = <256>;
+ cdns,block-size = <16>;
+ cdns,read-delay = <4>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+ };
+};
+
&usb1 {
status = "okay";
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCHv2] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
2016-10-26 18:05 [PATCHv2] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit dinguyen at opensource.altera.com
@ 2016-10-27 7:06 ` Steffen Trumtrar
2016-10-27 16:00 ` Dinh Nguyen
0 siblings, 1 reply; 3+ messages in thread
From: Steffen Trumtrar @ 2016-10-27 7:06 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Oct 26, 2016 at 01:05:12PM -0500, dinguyen at opensource.altera.com wrote:
> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>
> Enable the QSPI node and add the flash chip.
>
> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> ---
> v2: Remove partition entries for the SoCKIT
> ---
> arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
> index 02e22f5..2ce6736 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
> @@ -175,6 +175,27 @@
> status = "okay";
> };
>
> +&qspi {
> + status = "okay";
> +
> + flash: flash at 0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "n25q256a";
Did you test if this works correctly? According to my datasheet (Rev. C)
the HPS qspi is a n25q00. The n25q256a is the other one.
Regards,
Steffen
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^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCHv2] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
2016-10-27 7:06 ` Steffen Trumtrar
@ 2016-10-27 16:00 ` Dinh Nguyen
0 siblings, 0 replies; 3+ messages in thread
From: Dinh Nguyen @ 2016-10-27 16:00 UTC (permalink / raw)
To: linux-arm-kernel
On 10/27/2016 02:06 AM, Steffen Trumtrar wrote:
> On Wed, Oct 26, 2016 at 01:05:12PM -0500, dinguyen at opensource.altera.com wrote:
>> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>>
>> Enable the QSPI node and add the flash chip.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
>> ---
>> v2: Remove partition entries for the SoCKIT
>> ---
>> arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
>> index 02e22f5..2ce6736 100644
>> --- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
>> +++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
>> @@ -175,6 +175,27 @@
>> status = "okay";
>> };
>>
>> +&qspi {
>> + status = "okay";
>> +
>> + flash: flash at 0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "n25q256a";
>
> Did you test if this works correctly? According to my datasheet (Rev. C)
> the HPS qspi is a n25q00. The n25q256a is the other one.
>
No, I did not test this and thanks for catching it. On my SoCKIT, I see
a marking "25Q00AA" on the QSPI chip. So do you know if the compatible
string should be "n25q00a" or "n25q00". I guess I can test it.
Dinh
^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-10-26 18:05 [PATCHv2] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit dinguyen at opensource.altera.com
2016-10-27 7:06 ` Steffen Trumtrar
2016-10-27 16:00 ` Dinh Nguyen
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