From: benjamin.gaignard@linaro.org (Benjamin Gaignard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 7/7] ARM: dts: stm32: add STM32 General Purpose Timer driver in DT
Date: Thu, 8 Dec 2016 13:20:50 +0100 [thread overview]
Message-ID: <1481199650-22484-8-git-send-email-benjamin.gaignard@st.com> (raw)
In-Reply-To: <1481199650-22484-1-git-send-email-benjamin.gaignard@st.com>
Add General Purpose Timers and it sub-nodes into DT for stm32f4.
Define and enable pwm1 and pwm3 for stm32f469 discovery board
version 5:
- rename gptimer node to timers
- re-order timers node par addresses
version 4:
- remove unwanted indexing in pwm@ and timer@ node name
- use "reg" instead of additional parameters to set timer
configuration
version 3:
- use "st,stm32-timer-trigger" in DT
version 2:
- use parameters to describe hardware capabilities
- do not use references for pwm and iio timer subnodes
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
arch/arm/boot/dts/stm32f429.dtsi | 275 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/stm32f469-disco.dts | 28 ++++
2 files changed, 303 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index bca491d..fd68513 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -355,6 +355,21 @@
slew-rate = <2>;
};
};
+
+ pwm1_pins: pwm at 1 {
+ pins {
+ pinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,
+ <STM32F429_PB13_FUNC_TIM1_CH1N>,
+ <STM32F429_PB12_FUNC_TIM1_BKIN>;
+ };
+ };
+
+ pwm3_pins: pwm at 3 {
+ pins {
+ pinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,
+ <STM32F429_PB5_FUNC_TIM3_CH2>;
+ };
+ };
};
rcc: rcc at 40023810 {
@@ -426,6 +441,266 @@
interrupts = <80>;
clocks = <&rcc 0 38>;
};
+
+ timers2: timers at 40000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40000000 0x400>;
+ clocks = <&rcc 0 128>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <1>;
+ status = "disabled";
+ };
+ };
+
+ timers3: timers at 40000400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40000400 0x400>;
+ clocks = <&rcc 0 129>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <2>;
+ status = "disabled";
+ };
+ };
+
+ timers4: timers at 40000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40000800 0x400>;
+ clocks = <&rcc 0 130>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <3>;
+ status = "disabled";
+ };
+ };
+
+ timers5: timers at 40000C00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40000C00 0x400>;
+ clocks = <&rcc 0 131>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+
+ timers6: timers at 40001000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40001000 0x400>;
+ clocks = <&rcc 0 132>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <5>;
+ status = "disabled";
+ };
+ };
+
+ timers7: timers at 40001400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40001400 0x400>;
+ clocks = <&rcc 0 133>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <6>;
+ status = "disabled";
+ };
+ };
+
+ timers12: timers at 40001800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40001800 0x400>;
+ clocks = <&rcc 0 134>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <9>;
+ status = "disabled";
+ };
+ };
+
+ timers13: timers at 40001C00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40001C00 0x400>;
+ clocks = <&rcc 0 135>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+ };
+
+ timers14: timers at 40002000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40002000 0x400>;
+ clocks = <&rcc 0 136>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+ };
+
+ timers1: timers at 40010000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40010000 0x400>;
+ clocks = <&rcc 0 160>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <0>;
+ status = "disabled";
+ };
+ };
+
+ timers8: timers at 40010400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40010400 0x400>;
+ clocks = <&rcc 0 161>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <7>;
+ status = "disabled";
+ };
+ };
+
+ timers9: timers at 40014000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40014000 0x400>;
+ clocks = <&rcc 0 176>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+
+ timer at 0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <8>;
+ status = "disabled";
+ };
+ };
+
+ timers10: timers at 40014400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40014400 0x400>;
+ clocks = <&rcc 0 177>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+ };
+
+ timers11: timers at 40014800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-gptimer";
+ reg = <0x40014800 0x400>;
+ clocks = <&rcc 0 178>;
+ clock-names = "clk_int";
+ status = "disabled";
+
+ pwm at 0 {
+ compatible = "st,stm32-pwm";
+ status = "disabled";
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts
index 8a163d7..780f193 100644
--- a/arch/arm/boot/dts/stm32f469-disco.dts
+++ b/arch/arm/boot/dts/stm32f469-disco.dts
@@ -81,3 +81,31 @@
&usart3 {
status = "okay";
};
+
+&timers1 {
+ status = "okay";
+
+ pwm at 0 {
+ pinctrl-0 = <&pwm1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ timer at 0 {
+ status = "okay";
+ };
+};
+
+&timers3 {
+ status = "okay";
+
+ pwm at 0 {
+ pinctrl-0 = <&pwm3_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ timer at 0 {
+ status = "okay";
+ };
+};
--
1.9.1
prev parent reply other threads:[~2016-12-08 12:20 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-08 12:20 [PATCH v5 0/7] Add PWM and IIO timer drivers for STM32 Benjamin Gaignard
2016-12-08 12:20 ` [PATCH v5 1/7] MFD: add bindings for STM32 General Purpose Timer driver Benjamin Gaignard
2016-12-09 8:53 ` Lee Jones
2016-12-09 12:40 ` Benjamin Gaignard
2016-12-08 12:20 ` [PATCH v5 2/7] MFD: add " Benjamin Gaignard
2016-12-08 12:20 ` [PATCH v5 3/7] PWM: add pwm-stm32 DT bindings Benjamin Gaignard
2016-12-08 12:20 ` [PATCH v5 4/7] PWM: add PWM driver for STM32 plaftorm Benjamin Gaignard
2016-12-08 12:20 ` [PATCH v5 5/7] IIO: add bindings for STM32 timer trigger driver Benjamin Gaignard
2016-12-08 12:20 ` [PATCH v5 6/7] IIO: add " Benjamin Gaignard
2016-12-08 12:20 ` Benjamin Gaignard [this message]
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