From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 6/6] coresight-stm: adding driver for CoreSight STM component
Date: Fri, 05 Feb 2016 15:30:19 +0100 [thread overview]
Message-ID: <1481791.6NqBhgWcKU@wuerfel> (raw)
In-Reply-To: <87h9hn5msz.fsf@ashishki-desk.ger.corp.intel.com>
On Friday 05 February 2016 15:06:20 Alexander Shishkin wrote:
> Chunyan Zhang <zhang.chunyan@linaro.org> writes:
>
> > +#ifndef CONFIG_64BIT
> > +static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
> > +{
> > + asm volatile("strd %1, %0"
> > + : "+Qo" (*(volatile u64 __force *)addr)
> > + : "r" (val));
> > +}
>
> Is it really ok to do this for all !64bit arms, inside a driver, just
> like that? I'm not an expert, but I'm pretty sure there's more to it.
It's normally device dependent whether this works or not, on 32-bit
architectures, a 64-bit access to an I/O bus tends to get split into
two 32 bit accesses and the order might not be the as what was
intended.
We have functions in include/linux/io-64-nonatomic-hi-lo.h
and include/linux/io-64-nonatomic-lo-hi.h that are meant to
do this right. Maybe the driver can be changed to use whichever
one is correct for it.
Arnd
prev parent reply other threads:[~2016-02-05 14:30 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-03 8:15 [PATCH V2 0/6] Introduce CoreSight STM support Chunyan Zhang
2016-02-03 8:15 ` [PATCH V2 1/6] stm class: Add ioctl get_options interface Chunyan Zhang
2016-02-05 12:55 ` Alexander Shishkin
2016-02-03 8:15 ` [PATCH V2 2/6] stm class: adds a loop to extract the first valid STM device name Chunyan Zhang
2016-02-03 10:05 ` [PATCH] stm class: fix semicolon.cocci warnings kbuild test robot
2016-02-03 10:05 ` [PATCH V2 2/6] stm class: adds a loop to extract the first valid STM device name kbuild test robot
2016-02-04 8:56 ` Chunyan Zhang
2016-02-04 17:30 ` Alexander Shishkin
2016-02-05 3:18 ` Chunyan Zhang
2016-02-03 8:15 ` [PATCH V2 3/6] stm class: provision for statically assigned masterIDs Chunyan Zhang
2016-02-05 12:52 ` Alexander Shishkin
2016-02-05 16:31 ` Mike Leach
2016-02-08 10:52 ` Alexander Shishkin
2016-02-05 18:08 ` Mathieu Poirier
2016-02-08 13:26 ` Alexander Shishkin
2016-02-08 17:05 ` Mathieu Poirier
2016-02-08 17:44 ` Al Grant
2016-02-09 17:06 ` Mathieu Poirier
2016-02-12 15:54 ` Alexander Shishkin
2016-02-12 16:27 ` Alexander Shishkin
2016-02-12 20:33 ` Mathieu Poirier
2016-02-22 18:01 ` Mathieu Poirier
2016-02-03 8:15 ` [PATCH V2 4/6] Documentations: Add explanations of the case for non-configurable masters Chunyan Zhang
2016-02-03 8:15 ` [PATCH V2 5/6] coresight-stm: Bindings for System Trace Macrocell Chunyan Zhang
2016-02-03 8:15 ` [PATCH V2 6/6] coresight-stm: adding driver for CoreSight STM component Chunyan Zhang
2016-02-05 13:06 ` Alexander Shishkin
2016-02-05 14:30 ` Arnd Bergmann [this message]
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