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mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1773863773; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Content-Type:Message-Id:Reply-To; bh=7i7Sts2L5UVBiYhCcyvetXpuxZHpVPukk3YrxttDSSY=; b=k/X77GIBP4H0Y7nZk0GKcjVRZoVFAPWXzmpNgG9u8alGd67WBrbo51a1BtHCxtq7 dtEGdozh8h4+jvA4bJFg8I8s++GndCGhfgVdBJpWVrH18+YKOGjE2Urr/EJr3t/zcBS egNSG5lT1UwWUr2uYb1pfPbDBq24QXn5SOMZLnio= Received: by mx.zohomail.com with SMTPS id 1773863771726221.9025611389253; Wed, 18 Mar 2026 12:56:11 -0700 (PDT) From: Nicolas Frattaroli To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Heiko Stuebner , Sugar Zhang , Alexey Charkov Cc: linux-rockchip@lists.infradead.org, linux-sound@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexey Charkov Subject: Re: [PATCH] ASoC: rockchip: rockchip_sai: Set slot width for non-TDM mode Date: Wed, 18 Mar 2026 20:56:06 +0100 Message-ID: <14828456.uLZWGnKmhe@workhorse> In-Reply-To: <20260318-sai-slot-width-v1-1-1f68186f71e3@flipper.net> References: <20260318-sai-slot-width-v1-1-1f68186f71e3@flipper.net> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="utf-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260318_125623_781793_5496F9D4 X-CRM114-Status: GOOD ( 24.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wednesday, 18 March 2026 15:50:25 Central European Standard Time Alexey Charkov wrote: > Currently the slot width in non-TDM mode is always kept at the POR value > of 32 bits, regardless of the sample width, which doesn't work well for > some codecs such as NAU8822. > > Set the slot width according to the sample width in non-TDM mode, which > is what other CPU DAI drivers do. > > Tested on the following RK3576 configurations: > - SAI2 + NAU8822 (codec as the clock master), custom board > - SAI1 + ES8388 (codec as the clock master), RK3576 EVB1 > - SAI2 + RT5616 (SAI as the clock master), FriendlyElec NanoPi M5 > > NAU8822 didn't work prior to this patch but works after the patch. Other > two configurations work both before and after the patch. > > Fixes: cc78d1eaabad ("ASoC: rockchip: add Serial Audio Interface (SAI) driver") > Signed-off-by: Alexey Charkov > --- > sound/soc/rockchip/rockchip_sai.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/sound/soc/rockchip/rockchip_sai.c b/sound/soc/rockchip/rockchip_sai.c > index 1bf614dbdf4d..ed393e5034a4 100644 > --- a/sound/soc/rockchip/rockchip_sai.c > +++ b/sound/soc/rockchip/rockchip_sai.c > @@ -628,6 +628,10 @@ static int rockchip_sai_hw_params(struct snd_pcm_substream *substream, > > regmap_update_bits(sai->regmap, reg, SAI_XCR_VDW_MASK | SAI_XCR_CSR_MASK, val); > > + if (!sai->is_tdm) > + regmap_update_bits(sai->regmap, reg, SAI_XCR_SBW_MASK, > + SAI_XCR_SBW(params_physical_width(params))); > + > regmap_read(sai->regmap, reg, &val); > > slot_width = SAI_XCR_SBW_V(val); > > --- > base-commit: 8e5a478b6d6a5bb0a3d52147862b15e4d826af19 > change-id: 20260318-sai-slot-width-378eed5c22cd > > Best regards, > Thanks for the patch! Looking at where else this reg mask is used, I got curious about `rockchip_sai_set_tdm_slot`. It seems to reset SAI_XCR_SBW back to 32 when something calls it with 0 slots. Do we have to adjust this as well there? I think what we're running into here is the difference between I2S normal mode, and I2S justified mode. In justified modes, it'd be normal to have a slot bit width of 32 but a valid data width of, say, 16. In that case, VDJ would specify whether something is left or right justified as far as I can tell. So basically I'm wondering if we've accidentally been sending I2S left-justified data all along when using SND_SOC_DAIFMT_I2S, and whether we should only be setting this in SND_SOC_DAIFMT_I2S. Either way, I can give this a Tested-by: Nicolas Frattaroli for ES8388 on my ROCK 4D (with my enablement patches for it there on top that I need to get back around to). Kind regards, Nicolas Frattaroli