Re: [PATCH v5 3/3] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264

[Ashish Mhetre <amhetre@nvidia.com>]

On 7/10/2026 9:55 AM, Nicolin Chen wrote:
> On Thu, Jul 09, 2026 at 09:56:09AM +0000, Ashish Mhetre wrote:
>> Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can
>> survive an invalidation that races with concurrent traffic targeting
>> the same entry. The hardware-recommended software workaround is to
>> issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and
>> that infrastructure is already in place behind
>> arm_smmu_erratum_repeat_tlbi_cfgi_key.
>>
>> Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware
>> detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT
>> support) and already has a dedicated "nvidia,tegra264-smmu" compatible,
>> so DT-probe is the only viable detection path.
>>
>> Enable the workaround on instances matching the existing
>> "nvidia,tegra264-smmu" compatible by calling static_branch_enable() on
>> arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in
>> Documentation/arch/arm64/silicon-errata.rst.
>>
>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
>
> Sashiko pointed out a concern at PATCH-3 regarding the static key:
> https://sashiko.dev/#/patchset/20260709095613.831769-1-amhetre%40nvidia.com
>
> It's a false positive. But perhaps we could fold in an inline note;
> it'd belong to the missing description that I commented in PATCH-2.
>
> Nicolin

Ack, I will address this in v6.

Thanks,
Ashish Mhetre