[PATCH 0/3] pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

[PATCH 0/3] pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

[Vladimir Zapolskiy]

The change adds private of_xlate() function to process one argument given
along with a PWM phandle. LPC32xx SoCs have two independent single channel
PWM controllers, the argument is used as a description of PWM output
frequency, see previous discussion here:

  http://www.spinics.net/lists/arm-kernel/msg534068.html

The changes on actual board dts files are not needed at the moment, because
all LPC32xx boards in upstream don't describe any PWM consumers.

Vladimir Zapolskiy (3):
  dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties
  pwm: lpc32xx: switch driver to one phandle argument for PWM consumers
  pwm: lpc32xx: remove handling of PWM channels

 .../devicetree/bindings/pwm/lpc32xx-pwm.txt        |  7 +++++
 drivers/pwm/pwm-lpc32xx.c                          | 36 +++++++++++++++-------
 2 files changed, 32 insertions(+), 11 deletions(-)

-- 
2.10.2

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Vladimir Zapolskiy]

NXP LPC32xx SoCs have two simple independent PWM controllers with a single
output each, in this case there is no need to specify PWM channel argument
on client side, one cell for setting PWM output frequency is sufficient.

Another added to the description property 'clocks' has a standard meaning
of a controller supply clock, in the LPC32xx User's Manual the clock is
denoted as PWM1_CLK or PWM2_CLK clock.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
 Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
index 74b5bc5..523d796 100644
--- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
@@ -3,15 +3,22 @@ LPC32XX PWM controller
 Required properties:
 - compatible: should be "nxp,lpc3220-pwm"
 - reg: physical base address and length of the controller's registers
+- clocks: clock phandle and clock specifier pair
+- #pwm-cells: should be 1, the cell is used to specify the period in
+  nanoseconds.
 
 Examples:
 
 pwm at 4005c000 {
 	compatible = "nxp,lpc3220-pwm";
 	reg = <0x4005c000 0x4>;
+	clocks = <&clk LPC32XX_CLK_PWM1>;
+	#pwm-cells = <1>;
 };
 
 pwm at 4005c004 {
 	compatible = "nxp,lpc3220-pwm";
 	reg = <0x4005c004 0x4>;
+	clocks = <&clk LPC32XX_CLK_PWM2>;
+	#pwm-cells = <1>;
 };
-- 
2.10.2

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Sylvain Lemieux]

On Mon, 2016-12-05 at 03:42 +0200, Vladimir Zapolskiy wrote:
> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
> output each, in this case there is no need to specify PWM channel argument
> on client side, one cell for setting PWM output frequency is sufficient.
> 
> Another added to the description property 'clocks' has a standard meaning
> of a controller supply clock, in the LPC32xx User's Manual the clock is
> denoted as PWM1_CLK or PWM2_CLK clock.
> 
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
>  Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
Reviewed-by: Sylvain Lemieux <slemieux.tyco@gmail.com>

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Rob Herring]

On Mon, Dec 05, 2016 at 03:42:37AM +0200, Vladimir Zapolskiy wrote:
> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
> output each, in this case there is no need to specify PWM channel argument
> on client side, one cell for setting PWM output frequency is sufficient.
> 
> Another added to the description property 'clocks' has a standard meaning
> of a controller supply clock, in the LPC32xx User's Manual the clock is
> denoted as PWM1_CLK or PWM2_CLK clock.
> 
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
>  Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> index 74b5bc5..523d796 100644
> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> @@ -3,15 +3,22 @@ LPC32XX PWM controller
>  Required properties:
>  - compatible: should be "nxp,lpc3220-pwm"
>  - reg: physical base address and length of the controller's registers
> +- clocks: clock phandle and clock specifier pair
> +- #pwm-cells: should be 1, the cell is used to specify the period in
> +  nanoseconds.

This use of the cell is a bit odd as the period is s/w config and this 
would typically be a channel selection or such.

What if I want user specified/changed periods?

Rob

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Vladimir Zapolskiy]

Hi Rob,

On 12/09/2016 11:41 PM, Rob Herring wrote:
> On Mon, Dec 05, 2016 at 03:42:37AM +0200, Vladimir Zapolskiy wrote:
>> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
>> output each, in this case there is no need to specify PWM channel argument
>> on client side, one cell for setting PWM output frequency is sufficient.
>>
>> Another added to the description property 'clocks' has a standard meaning
>> of a controller supply clock, in the LPC32xx User's Manual the clock is
>> denoted as PWM1_CLK or PWM2_CLK clock.
>>
>> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
>> ---
>>  Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>> index 74b5bc5..523d796 100644
>> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>> +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>> @@ -3,15 +3,22 @@ LPC32XX PWM controller
>>  Required properties:
>>  - compatible: should be "nxp,lpc3220-pwm"
>>  - reg: physical base address and length of the controller's registers
>> +- clocks: clock phandle and clock specifier pair
>> +- #pwm-cells: should be 1, the cell is used to specify the period in
>> +  nanoseconds.
> 
> This use of the cell is a bit odd as the period is s/w config and this 
> would typically be a channel selection or such.

this is a classic PWM channel configuration property for PWM consumers
described in DT, for instance PWM frequency for display panel backlight
on boot.

I think >90% of PWM controllers with device tree bindings have this
argument in #pwm-cells, from bindings/pwm/pwm.txt :

    pwm-specifier typically encodes the chip-relative PWM number and
    the PWM period in nanoseconds.

You also may skim through phandle arguments of 'pwms' property,
commonly the second argument is the requested frequency.

In this particular case I just drop PWM channel number, because
the LPC32xx PWM controller has a single output channel.

> What if I want user specified/changed periods?
> 

The preset period still can be changed over sysfs in runtime.

--
With best wishes,
Vladimir

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Vladimir Zapolskiy]

On 12/10/2016 01:51 AM, Vladimir Zapolskiy wrote:
> Hi Rob,
> 
> On 12/09/2016 11:41 PM, Rob Herring wrote:
>> On Mon, Dec 05, 2016 at 03:42:37AM +0200, Vladimir Zapolskiy wrote:
>>> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
>>> output each, in this case there is no need to specify PWM channel argument
>>> on client side, one cell for setting PWM output frequency is sufficient.
>>>
>>> Another added to the description property 'clocks' has a standard meaning
>>> of a controller supply clock, in the LPC32xx User's Manual the clock is
>>> denoted as PWM1_CLK or PWM2_CLK clock.
>>>
>>> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
>>> ---
>>>  Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
>>>  1 file changed, 7 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>>> index 74b5bc5..523d796 100644
>>> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>>> +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>>> @@ -3,15 +3,22 @@ LPC32XX PWM controller
>>>  Required properties:
>>>  - compatible: should be "nxp,lpc3220-pwm"
>>>  - reg: physical base address and length of the controller's registers
>>> +- clocks: clock phandle and clock specifier pair
>>> +- #pwm-cells: should be 1, the cell is used to specify the period in
>>> +  nanoseconds.
>>
>> This use of the cell is a bit odd as the period is s/w config and this 
>> would typically be a channel selection or such.
> 
> this is a classic PWM channel configuration property for PWM consumers
> described in DT, for instance PWM frequency for display panel backlight
> on boot.
> 
> I think >90% of PWM controllers with device tree bindings have this
> argument in #pwm-cells, from bindings/pwm/pwm.txt :
> 
>     pwm-specifier typically encodes the chip-relative PWM number and
>     the PWM period in nanoseconds.
> 
> You also may skim through phandle arguments of 'pwms' property,
> commonly the second argument is the requested frequency.
> 
> In this particular case I just drop PWM channel number, because
> the LPC32xx PWM controller has a single output channel.
> 
>> What if I want user specified/changed periods?
>>
> 
> The preset period still can be changed over sysfs in runtime.

Rob, have I managed to answer your questions?

If you accept my clarification, could you please ack the change?

--
With best wishes,
Vladimir

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Sylvain Lemieux]

Hi Rob,

On Wed, 2016-12-21 at 05:30 +0200, Vladimir Zapolskiy wrote:
> On 12/10/2016 01:51 AM, Vladimir Zapolskiy wrote:
> > Hi Rob,
> > 
> > On 12/09/2016 11:41 PM, Rob Herring wrote:
> >> On Mon, Dec 05, 2016 at 03:42:37AM +0200, Vladimir Zapolskiy wrote:
> >>> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
> >>> output each, in this case there is no need to specify PWM channel argument
> >>> on client side, one cell for setting PWM output frequency is sufficient.
> >>>
> >>> Another added to the description property 'clocks' has a standard meaning
> >>> of a controller supply clock, in the LPC32xx User's Manual the clock is
> >>> denoted as PWM1_CLK or PWM2_CLK clock.
> >>>
> >>> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> >>> ---
> >>>  Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
> >>>  1 file changed, 7 insertions(+)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> >>> index 74b5bc5..523d796 100644
> >>> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> >>> +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> >>> @@ -3,15 +3,22 @@ LPC32XX PWM controller
> >>>  Required properties:
> >>>  - compatible: should be "nxp,lpc3220-pwm"
> >>>  - reg: physical base address and length of the controller's registers
> >>> +- clocks: clock phandle and clock specifier pair
> >>> +- #pwm-cells: should be 1, the cell is used to specify the period in
> >>> +  nanoseconds.
> >>
> >> This use of the cell is a bit odd as the period is s/w config and this 
> >> would typically be a channel selection or such.
> > 
> > this is a classic PWM channel configuration property for PWM consumers
> > described in DT, for instance PWM frequency for display panel backlight
> > on boot.
> > 
> > I think >90% of PWM controllers with device tree bindings have this
> > argument in #pwm-cells, from bindings/pwm/pwm.txt :
> > 
> >     pwm-specifier typically encodes the chip-relative PWM number and
> >     the PWM period in nanoseconds.
> > 
> > You also may skim through phandle arguments of 'pwms' property,
> > commonly the second argument is the requested frequency.
> > 
> > In this particular case I just drop PWM channel number, because
> > the LPC32xx PWM controller has a single output channel.
> > 
> >> What if I want user specified/changed periods?
> >>
> > 
> > The preset period still can be changed over sysfs in runtime.
> 
> Rob, have I managed to answer your questions?
> 
> If you accept my clarification, could you please ack the change?
> 
> --
> With best wishes,
> Vladimir
> 
ping

Sylvain

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Sylvain Lemieux]

Hi Rob,

On Tue, 2017-01-03 at 10:22 -0500, Sylvain Lemieux wrote:
> Hi Rob,
> 
> On Wed, 2016-12-21 at 05:30 +0200, Vladimir Zapolskiy wrote:
> > On 12/10/2016 01:51 AM, Vladimir Zapolskiy wrote:
> > > Hi Rob,
> > > 
> > > On 12/09/2016 11:41 PM, Rob Herring wrote:
> > >> On Mon, Dec 05, 2016 at 03:42:37AM +0200, Vladimir Zapolskiy wrote:
> > >>> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
> > >>> output each, in this case there is no need to specify PWM channel argument
> > >>> on client side, one cell for setting PWM output frequency is sufficient.
> > >>>
> > >>> Another added to the description property 'clocks' has a standard meaning
> > >>> of a controller supply clock, in the LPC32xx User's Manual the clock is
> > >>> denoted as PWM1_CLK or PWM2_CLK clock.
> > >>>
> > >>> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> > >>> ---
> > >>>  Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
> > >>>  1 file changed, 7 insertions(+)
> > >>>
> > >>> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> > >>> index 74b5bc5..523d796 100644
> > >>> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> > >>> +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> > >>> @@ -3,15 +3,22 @@ LPC32XX PWM controller
> > >>>  Required properties:
> > >>>  - compatible: should be "nxp,lpc3220-pwm"
> > >>>  - reg: physical base address and length of the controller's registers
> > >>> +- clocks: clock phandle and clock specifier pair
> > >>> +- #pwm-cells: should be 1, the cell is used to specify the period in
> > >>> +  nanoseconds.
> > >>
> > >> This use of the cell is a bit odd as the period is s/w config and this 
> > >> would typically be a channel selection or such.
> > > 
> > > this is a classic PWM channel configuration property for PWM consumers
> > > described in DT, for instance PWM frequency for display panel backlight
> > > on boot.
> > > 
> > > I think >90% of PWM controllers with device tree bindings have this
> > > argument in #pwm-cells, from bindings/pwm/pwm.txt :
> > > 
> > >     pwm-specifier typically encodes the chip-relative PWM number and
> > >     the PWM period in nanoseconds.
> > > 
> > > You also may skim through phandle arguments of 'pwms' property,
> > > commonly the second argument is the requested frequency.
> > > 
> > > In this particular case I just drop PWM channel number, because
> > > the LPC32xx PWM controller has a single output channel.
> > > 
> > >> What if I want user specified/changed periods?
> > >>
> > > 
> > > The preset period still can be changed over sysfs in runtime.
> > 
> > Rob, have I managed to answer your questions?
> > 
> > If you accept my clarification, could you please ack the change?
> > 
> > --
> > With best wishes,
> > Vladimir
> > 
> ping
> 
> Sylvain
> 
Can you provide feedback; I think your questions were answered
by Vladimir.

Regards,
Sylvain

[PATCH 1/3] dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

[Rob Herring]

On Tue, Feb 7, 2017 at 1:03 PM, Sylvain Lemieux <slemieux.tyco@gmail.com> wrote:
> Hi Rob,
>
> On Tue, 2017-01-03 at 10:22 -0500, Sylvain Lemieux wrote:
>> Hi Rob,
>>
>> On Wed, 2016-12-21 at 05:30 +0200, Vladimir Zapolskiy wrote:
>> > On 12/10/2016 01:51 AM, Vladimir Zapolskiy wrote:
>> > > Hi Rob,
>> > >
>> > > On 12/09/2016 11:41 PM, Rob Herring wrote:
>> > >> On Mon, Dec 05, 2016 at 03:42:37AM +0200, Vladimir Zapolskiy wrote:
>> > >>> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
>> > >>> output each, in this case there is no need to specify PWM channel argument
>> > >>> on client side, one cell for setting PWM output frequency is sufficient.
>> > >>>
>> > >>> Another added to the description property 'clocks' has a standard meaning
>> > >>> of a controller supply clock, in the LPC32xx User's Manual the clock is
>> > >>> denoted as PWM1_CLK or PWM2_CLK clock.
>> > >>>
>> > >>> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
>> > >>> ---
>> > >>>  Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
>> > >>>  1 file changed, 7 insertions(+)
>> > >>>
>> > >>> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>> > >>> index 74b5bc5..523d796 100644
>> > >>> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>> > >>> +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
>> > >>> @@ -3,15 +3,22 @@ LPC32XX PWM controller
>> > >>>  Required properties:
>> > >>>  - compatible: should be "nxp,lpc3220-pwm"
>> > >>>  - reg: physical base address and length of the controller's registers
>> > >>> +- clocks: clock phandle and clock specifier pair
>> > >>> +- #pwm-cells: should be 1, the cell is used to specify the period in
>> > >>> +  nanoseconds.
>> > >>
>> > >> This use of the cell is a bit odd as the period is s/w config and this
>> > >> would typically be a channel selection or such.
>> > >
>> > > this is a classic PWM channel configuration property for PWM consumers
>> > > described in DT, for instance PWM frequency for display panel backlight
>> > > on boot.
>> > >
>> > > I think >90% of PWM controllers with device tree bindings have this
>> > > argument in #pwm-cells, from bindings/pwm/pwm.txt :
>> > >
>> > >     pwm-specifier typically encodes the chip-relative PWM number and
>> > >     the PWM period in nanoseconds.
>> > >
>> > > You also may skim through phandle arguments of 'pwms' property,
>> > > commonly the second argument is the requested frequency.
>> > >
>> > > In this particular case I just drop PWM channel number, because
>> > > the LPC32xx PWM controller has a single output channel.
>> > >
>> > >> What if I want user specified/changed periods?
>> > >>
>> > >
>> > > The preset period still can be changed over sysfs in runtime.
>> >
>> > Rob, have I managed to answer your questions?
>> >
>> > If you accept my clarification, could you please ack the change?
>> >
>> > --
>> > With best wishes,
>> > Vladimir
>> >
>> ping
>>
>> Sylvain
>>
> Can you provide feedback; I think your questions were answered
> by Vladimir.

Yes. Sorry for the delay. It's best to resend if you want to be sure I see it.

Acked-by: Rob Herring <robh@kernel.org>

Rob

[PATCH 2/3] pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

[Vladimir Zapolskiy]

NXP LPC32xx SoCs have two simple independent PWM controllers with a single
output each, in this case there is no need to specify PWM channel argument
on client side, one cell for setting PWM output frequency is sufficient.

The change adds private of_xlate() handling of a single cell value given
with a PWM phandle on client side, the handling is taken from the PXA PWM
driver.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
 drivers/pwm/pwm-lpc32xx.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index a9b3cff..ce84181 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -92,6 +92,20 @@ static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 	clk_disable_unprepare(lpc32xx->clk);
 }
 
+static struct pwm_device *lpc32xx_pwm_of_xlate(struct pwm_chip *pc,
+				       const struct of_phandle_args *args)
+{
+	struct pwm_device *pwm;
+
+	pwm = pwm_request_from_chip(pc, 0, NULL);
+	if (IS_ERR(pwm))
+		return pwm;
+
+	pwm->args.period = args->args[0];
+
+	return pwm;
+}
+
 static const struct pwm_ops lpc32xx_pwm_ops = {
 	.config = lpc32xx_pwm_config,
 	.enable = lpc32xx_pwm_enable,
@@ -123,6 +137,8 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 	lpc32xx->chip.ops = &lpc32xx_pwm_ops;
 	lpc32xx->chip.npwm = 1;
 	lpc32xx->chip.base = -1;
+	lpc32xx->chip.of_xlate = lpc32xx_pwm_of_xlate;
+	lpc32xx->chip.of_pwm_n_cells = 1;
 
 	ret = pwmchip_add(&lpc32xx->chip);
 	if (ret < 0) {
-- 
2.10.2

[PATCH 2/3] pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

[Sylvain Lemieux]

On Mon, 2016-12-05 at 03:43 +0200, Vladimir Zapolskiy wrote:
> NXP LPC32xx SoCs have two simple independent PWM controllers with a single
> output each, in this case there is no need to specify PWM channel argument
> on client side, one cell for setting PWM output frequency is sufficient.
> 
> The change adds private of_xlate() handling of a single cell value given
> with a PWM phandle on client side, the handling is taken from the PXA PWM
> driver.
> 
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
>  drivers/pwm/pwm-lpc32xx.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
Reviewed-by: Sylvain Lemieux <slemieux.tyco@gmail.com>

[PATCH 3/3] pwm: lpc32xx: remove handling of PWM channels

[Vladimir Zapolskiy]

Because LPC32xx PWM controllers have single output which is registered as
the only PWM device/channel per controller, it is known in advance that
pwm->hwpwm value is always 0. On basis of this fact simplify the code
by removing operations with pwm->hwpwm, there is no controls which require
channel number as input.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---
 drivers/pwm/pwm-lpc32xx.c | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index ce84181..786c887 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -55,10 +55,10 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	if (duty_cycles > 255)
 		duty_cycles = 255;
 
-	val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val &= ~0xFFFF;
 	val |= (period_cycles << 8) | duty_cycles;
-	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	return 0;
 }
@@ -73,9 +73,9 @@ static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 	if (ret)
 		return ret;
 
-	val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val |= PWM_ENABLE;
-	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	return 0;
 }
@@ -85,9 +85,9 @@ static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 	struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
 	u32 val;
 
-	val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val &= ~PWM_ENABLE;
-	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	clk_disable_unprepare(lpc32xx->clk);
 }
@@ -147,9 +147,9 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 	}
 
 	/* When PWM is disable, configure the output to the default value */
-	val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val &= ~PWM_PIN_LEVEL;
-	writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	platform_set_drvdata(pdev, lpc32xx);
 
@@ -159,10 +159,8 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 static int lpc32xx_pwm_remove(struct platform_device *pdev)
 {
 	struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
-	unsigned int i;
 
-	for (i = 0; i < lpc32xx->chip.npwm; i++)
-		pwm_disable(&lpc32xx->chip.pwms[i]);
+	pwm_disable(&lpc32xx->chip.pwms[0]);
 
 	return pwmchip_remove(&lpc32xx->chip);
 }
-- 
2.10.2

[PATCH 3/3] pwm: lpc32xx: remove handling of PWM channels

[Sylvain Lemieux]

On Mon, 2016-12-05 at 03:43 +0200, Vladimir Zapolskiy wrote:
> Because LPC32xx PWM controllers have single output which is registered as
> the only PWM device/channel per controller, it is known in advance that
> pwm->hwpwm value is always 0. On basis of this fact simplify the code
> by removing operations with pwm->hwpwm, there is no controls which require
> channel number as input.
> 
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
>  drivers/pwm/pwm-lpc32xx.c | 20 +++++++++-----------
>  1 file changed, 9 insertions(+), 11 deletions(-)
> 
Reviewed-by: Sylvain Lemieux <slemieux.tyco@gmail.com>