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From: ard.biesheuvel@linaro.org (Ard Biesheuvel)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 06/11] arm64/mmu: align alloc_init_pte prototype with pmd/pud versions
Date: Thu,  9 Mar 2017 21:52:04 +0100	[thread overview]
Message-ID: <1489092729-16871-7-git-send-email-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <1489092729-16871-1-git-send-email-ard.biesheuvel@linaro.org>

Align the function prototype of alloc_init_pte() with its pmd and pud
counterparts by replacing the pfn parameter with the equivalent physical
address.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 arch/arm64/mm/mmu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 75e21c33caff..bb9179084217 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -107,7 +107,7 @@ static bool pgattr_change_is_safe(u64 old, u64 new)
 }
 
 static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
-				  unsigned long end, unsigned long pfn,
+				  unsigned long end, phys_addr_t phys,
 				  pgprot_t prot,
 				  phys_addr_t (*pgtable_alloc)(void))
 {
@@ -128,8 +128,7 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
 	do {
 		pte_t old_pte = *pte;
 
-		set_pte(pte, pfn_pte(pfn, prot));
-		pfn++;
+		set_pte(pte, pfn_pte(__phys_to_pfn(phys), prot));
 
 		/*
 		 * After the PTE entry has been populated once, we
@@ -137,6 +136,7 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
 		 */
 		BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte)));
 
+		phys += PAGE_SIZE;
 	} while (pte++, addr += PAGE_SIZE, addr != end);
 
 	pte_clear_fixmap();
@@ -182,7 +182,7 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
 			BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
 						      pmd_val(*pmd)));
 		} else {
-			alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys),
+			alloc_init_pte(pmd, addr, next, phys,
 				       prot, pgtable_alloc);
 
 			BUG_ON(pmd_val(old_pmd) != 0 &&
-- 
2.7.4

  parent reply	other threads:[~2017-03-09 20:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-09 20:51 [PATCH v6 00/11] arm64: mmu: avoid W+X mappings and re-enable PTE_CONT for kernel Ard Biesheuvel
2017-03-09 20:51 ` [PATCH v6 01/11] arm: kvm: move kvm_vgic_global_state out of .text section Ard Biesheuvel
2017-03-09 20:52 ` [PATCH v6 02/11] arm64: mmu: move TLB maintenance from callers to create_mapping_late() Ard Biesheuvel
2017-03-09 20:52 ` [PATCH v6 03/11] arm64: alternatives: apply boot time fixups via the linear mapping Ard Biesheuvel
2017-03-09 20:52 ` [PATCH v6 04/11] arm64: mmu: map .text as read-only from the outset Ard Biesheuvel
2017-03-09 20:52 ` [PATCH v6 05/11] arm64: mmu: apply strict permissions to .init.text and .init.data Ard Biesheuvel
2017-03-09 20:52 ` Ard Biesheuvel [this message]
2017-03-09 20:52 ` [PATCH v6 07/11] arm64/mmu: ignore debug_pagealloc for kernel segments Ard Biesheuvel
2017-03-09 20:52 ` [PATCH v6 08/11] arm64/mmu: add contiguous bit to sanity bug check Ard Biesheuvel
2017-03-09 20:52 ` [PATCH v6 09/11] arm64/mmu: replace 'page_mappings_only' parameter with flags argument Ard Biesheuvel
2017-03-09 20:52 ` [PATCH v6 10/11] arm64/mm: remove pointless map/unmap sequences when creating page tables Ard Biesheuvel
2017-03-10 11:25   ` Mark Rutland
2017-03-09 20:52 ` [PATCH v6 11/11] arm64: mm: set the contiguous bit for kernel mappings where appropriate Ard Biesheuvel
2017-03-10 12:30   ` Mark Rutland
2017-03-23 14:12 ` [PATCH v6 00/11] arm64: mmu: avoid W+X mappings and re-enable PTE_CONT for kernel Catalin Marinas

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