[PATCH v2 0/2] STM32F4 clock fixes

[gabriel.fernandez@st.com (gabriel.fernandez at st.com)]

From: Gabriel Fernandez <gabriel.fernandez@st.com>

v2:
Just add "Fixes" tags.

This patch-set contains 2 fixes.
One concerning exclusion of wrong values for PLLQ (0 & 1)
Fixes: 83135ad3c517 ("clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards")

And the second is a fix about timeout management of PLL and LSE/LSI clocks.
Fixes: 861adc44d290 ("clk: stm32f4: Add LSI & LSE clocks")

Gabriel Fernandez (2):
  clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
  clk: stm32f4: fix timeout management for pll and ready gate

 drivers/clk/clk-stm32f4.c | 56 +++++++++++++++++++++++++++++++++--------------
 1 file changed, 39 insertions(+), 17 deletions(-)

-- 
1.9.1