From: xuwei5@hisilicon.com (Wei.Xu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/5] arm64: dts: hisi: enalbe the NIC and SAS for the hip07-d05 board
Date: Fri, 7 Apr 2017 10:07:56 +0800 [thread overview]
Message-ID: <1491530876-109791-6-git-send-email-xuwei5@hisilicon.com> (raw)
In-Reply-To: <1491530876-109791-1-git-send-email-xuwei5@hisilicon.com>
From: Wei Xu <xuwei5@hisilicon.com>
Enalbe the NIC and SAS nodes for the hip07-d05 board
to support related functions.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip07-d05.dts | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
index e058442..5bdca80 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
@@ -64,3 +64,27 @@
&usb_ehci {
status = "ok";
};
+
+ð0 {
+ status = "ok";
+};
+
+ð1 {
+ status = "ok";
+};
+
+ð2 {
+ status = "ok";
+};
+
+ð3 {
+ status = "ok";
+};
+
+&p0_pcie2_a {
+ status = "ok";
+};
+
+&sas1 {
+ status = "ok";
+};
--
1.9.1
next prev parent reply other threads:[~2017-04-07 2:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-07 2:07 [PATCH 0/5] arm64: dts: hisi: add NIC, RoCE and SAS support for hip07 Wei.Xu
2017-04-07 2:07 ` [PATCH 1/5] arm64: dts: hisi: add mbigen nodes for the hip07 SoC Wei.Xu
2017-04-07 2:07 ` [PATCH 2/5] arm64: dts: hisi: add network related " Wei.Xu
2017-04-07 2:07 ` [PATCH 3/5] arm64: dts: hisi: add RoCE " Wei.Xu
2017-04-07 2:07 ` [PATCH 4/5] arm64: dts: hisi: add SAS " Wei.Xu
2017-04-07 2:07 ` Wei.Xu [this message]
2017-04-08 6:51 ` [PATCH 0/5] arm64: dts: hisi: add NIC, RoCE and SAS support for hip07 Wei Xu
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