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From: anup.patel@broadcom.com (Anup Patel)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 08/11] arm64: dts: Add GPIO DT nodes for Stingray SOC
Date: Mon, 15 May 2017 17:32:18 +0530	[thread overview]
Message-ID: <1494849741-21294-9-git-send-email-anup.patel@broadcom.com> (raw)
In-Reply-To: <1494849741-21294-1-git-send-email-anup.patel@broadcom.com>

From: Pramod Kumar <pramod.kumar@broadcom.com>

The GPIOs on Stingray SOC are based on iProc GPIOs hence
using this we add GPIO DT nodes for Stingray SOC.

Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
 .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 34 ++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index c3a8cee..2b24d07 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -256,6 +256,14 @@
 		ranges = <0x0 0x0 0x66400000 0x100000>;
 
 		#include "stingray-clock.dtsi"
+
+		gpio_crmu: gpio at 66424800 {
+			compatible = "brcm,iproc-gpio";
+			reg = <0x00024800 0x4c>;
+			ngpios = <6>;
+			#gpio-cells = <2>;
+			gpio-controller;
+		};
 	};
 
 	hsls {
@@ -266,6 +274,32 @@
 
 		#include "stingray-pinctrl.dtsi"
 
+		gpio_hsls: gpio at 689d0000 {
+			compatible = "brcm,iproc-gpio";
+			reg = <0x000d0000 0x864>;
+			ngpios = <151>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			interrupt-controller;
+			interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-ranges = <&pinmux 0 0 16>,
+					<&pinmux 16 71 2>,
+					<&pinmux 18 131 8>,
+					<&pinmux 26 83 6>,
+					<&pinmux 32 123 4>,
+					<&pinmux 36 43 24>,
+					<&pinmux 60 89 2>,
+					<&pinmux 62 73 4>,
+					<&pinmux 66 95 28>,
+					<&pinmux 94 127 4>,
+					<&pinmux 98 139 10>,
+					<&pinmux 108 16 27>,
+					<&pinmux 135 77 6>,
+					<&pinmux 141 67 4>,
+					<&pinmux 145 149 6>,
+					<&pinmux 151 91 4>;
+		};
+
 		uart0: uart at 68a00000 {
 			device_type = "serial";
 			compatible = "snps,dw-apb-uart";
-- 
2.7.4

  parent reply	other threads:[~2017-05-15 12:02 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-15 12:02 [PATCH v2 00/11] Broadcom Stingray SOC Initial Support Anup Patel
2017-05-15 12:02 ` [PATCH v2 01/11] dt-bindings: bcm: Add Broadcom Stingray bindings document Anup Patel
2017-05-15 12:02 ` [PATCH v2 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC Anup Patel
2017-05-15 12:02 ` [PATCH v2 03/11] clk: bcm: Add clocks " Anup Patel
2017-05-15 12:02 ` [PATCH v2 04/11] arm64: dts: Initial DTS files for Broadcom " Anup Patel
2017-05-15 13:13   ` Mark Rutland
2017-05-15 16:04     ` Scott Branden
2017-05-16 10:47     ` Anup Patel
2017-05-15 12:02 ` [PATCH v2 05/11] arm64: dts: Add clock DT nodes for " Anup Patel
2017-05-15 12:02 ` [PATCH v2 06/11] arm64: dts: Add NAND " Anup Patel
2017-05-15 12:02 ` [PATCH v2 07/11] arm64: dts: Add pinctrl " Anup Patel
2017-05-15 12:02 ` Anup Patel [this message]
2017-05-15 12:02 ` [PATCH v2 09/11] arm64: dts: Add I2C DT nodes for Stingray SoC Anup Patel
2017-05-15 12:02 ` [PATCH v2 10/11] arm64: dts: Add PL022, PL330 and SP805 DT nodes for Stingray Anup Patel
2017-05-15 12:02 ` [PATCH v2 11/11] arm64: dts: Add PWM and SDHCI DT nodes for Stingray SOC Anup Patel

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