From: zhi.mao@mediatek.com (Zhi Mao)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/6] pwm: mediatek: fix pwm source clock selection
Date: Fri, 23 Jun 2017 13:08:21 +0800 [thread overview]
Message-ID: <1498194505-30930-3-git-send-email-zhi.mao@mediatek.com> (raw)
In-Reply-To: <1498194505-30930-1-git-send-email-zhi.mao@mediatek.com>
In original code, the pwm output frequency is not correct
when set bit<3>=1 to PWMCON register.
Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
---
drivers/pwm/pwm-mediatek.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index 5c11bc7..d08b5b3 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -91,7 +91,7 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
if (clkdiv > 7)
return -EINVAL;
- mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | BIT(3) | clkdiv);
+ mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution);
--
1.7.9.5
next prev parent reply other threads:[~2017-06-23 5:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-23 5:08 [PATCH v2 0/6] mediatek: pwm driver add MT2712/MT7622 support Zhi Mao
2017-06-23 5:08 ` [PATCH v2 1/6] pwm: kconfig: modify mediatek information Zhi Mao
2017-06-23 5:08 ` Zhi Mao [this message]
2017-06-23 5:08 ` [PATCH v2 3/6] pwm: mediatek: fix clock control issue Zhi Mao
2017-06-23 5:08 ` [PATCH v2 4/6] pwm: bindings: add MT2712/MT7622 information Zhi Mao
2017-06-26 19:04 ` Rob Herring
2017-06-23 5:08 ` [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX Zhi Mao
2017-06-26 8:43 ` m18063
2017-06-27 2:50 ` Zhi Mao
2017-06-23 5:08 ` [PATCH v2 6/6] pwm: mediatek: add MT2712/MT7622 support Zhi Mao
2017-06-23 5:48 ` [PATCH v2 0/6] mediatek: pwm driver " John Crispin
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