From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] coresight: etb10: Remove useless conversion to LE
Date: Fri, 30 Jun 2017 11:41:56 -0600 [thread overview]
Message-ID: <1498844519-8845-3-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1498844519-8845-1-git-send-email-mathieu.poirier@linaro.org>
Internal CoreSight components are rendering trace data in little-endian
format. As such there is no need to convert the data once more, hence
removing the extra step.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/hwtracing/coresight/coresight-etb10.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c
index d9c233135d6d..50f4846e6271 100644
--- a/drivers/hwtracing/coresight/coresight-etb10.c
+++ b/drivers/hwtracing/coresight/coresight-etb10.c
@@ -233,10 +233,8 @@ static void etb_dump_hw(struct etb_drvdata *drvdata)
for (i = 0; i < depth; i++) {
read_data = readl_relaxed(drvdata->base +
ETB_RAM_READ_DATA_REG);
- *buf_ptr++ = read_data >> 0;
- *buf_ptr++ = read_data >> 8;
- *buf_ptr++ = read_data >> 16;
- *buf_ptr++ = read_data >> 24;
+ *(u32 *)buf_ptr = read_data;
+ buf_ptr += 4;
}
if (frame_off) {
@@ -444,10 +442,8 @@ static void etb_update_buffer(struct coresight_device *csdev,
buf_ptr = buf->data_pages[cur] + offset;
read_data = readl_relaxed(drvdata->base +
ETB_RAM_READ_DATA_REG);
- *buf_ptr++ = read_data >> 0;
- *buf_ptr++ = read_data >> 8;
- *buf_ptr++ = read_data >> 16;
- *buf_ptr++ = read_data >> 24;
+ *(u32 *)buf_ptr = read_data;
+ buf_ptr += 4;
offset += 4;
if (offset >= PAGE_SIZE) {
--
2.7.4
next prev parent reply other threads:[~2017-06-30 17:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-30 17:41 [PATCH 0/5] coresight: Miscellaneous fixes Mathieu Poirier
2017-06-30 17:41 ` [PATCH 1/5] coresight: Correct buffer lost increment Mathieu Poirier
2017-06-30 17:41 ` Mathieu Poirier [this message]
2017-06-30 17:41 ` [PATCH 3/5] coresight: Add barrier packet for synchronisation Mathieu Poirier
2017-06-30 17:41 ` [PATCH 4/5] coresight: etb10: Move etb_disable_hw() outside of lock Mathieu Poirier
2017-06-30 17:41 ` [PATCH 5/5] coresight: etm3x: Set synchronisation frequencty to TRM default Mathieu Poirier
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