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[85.4.92.72]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fe5694fbfsm363386665e9.6.2026.05.17.13.37.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 May 2026 13:37:52 -0700 (PDT) Message-ID: <14a7e289ff5ffed8fcd6dcb9b2e8455a1b2c9420.camel@gmail.com> Subject: Re: [PATCH v2 3/3] arm64: dts: allwinner: A133: add support for Baijie Helper A133 board From: Alexander Sverdlin To: Andre Przywara , linux-sunxi@lists.linux.dev Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Sun, 17 May 2026 22:38:13 +0200 In-Reply-To: <2306dd3c-6362-40ee-8d9f-77f89be3a502@arm.com> References: <20260510201644.4143710-1-alexander.sverdlin@gmail.com> <20260510201644.4143710-4-alexander.sverdlin@gmail.com> <2306dd3c-6362-40ee-8d9f-77f89be3a502@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.60.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260517_133755_922741_A1303814 X-CRM114-Status: GOOD ( 37.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andre, thanks for the quick feedback! On Mon, 2026-05-11 at 13:44 +0200, Andre Przywara wrote: > > --- /dev/null > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a133-baije-core.dtsi > > @@ -0,0 +1,162 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > +/* > > + * Copyright (c) 2025 Arm Ltd. >=20 > Please put your own copyright here, even if that has been largely copied= =20 > from an existing file. >=20 > > + */ > > + > > +/dts-v1/; > > + > > +#include "sun50i-a100.dtsi" > > +#include "sun50i-a100-cpu-opp.dtsi" > > + > > +/{ > > + compatible =3D "baijie,helper-a133-core", > > + =C2=A0=C2=A0=C2=A0=C2=A0 "allwinner,sun50i-a100"; > > + > > + aliases { > > + serial1 =3D &uart1; /* BT module */ >=20 > Do we really need an alias for the BT UART? And is the BT module=20 > supported already? Then please add a child node to the UART node. That's the only thing I can do currently regarding BT: stabilize the serial enumeration, because UART1 cannot be used for anything else except BT module, because this is soldered inside "core" module. We can avoid different tty enumeration, should the support for BT be implemented in the future... > Isn't the WiFi/BT module on the SoM? Then please mention and enable MMC1= =20 > here. Provide the child node for the WiFi chip, even if there is no=20 > upstream support in the kernel for it yet. So both the above BT and the WiFi is AW869A/AIC8800 combo chip, which has neither upstream driver, nor [upstream] DT bindings. Even github driver for AIC8800 doesn't seem to use DT, therefore it looks quite pointless to me at this point to specify anything in the DT for the chip which doesn't have the bindings idea even theoretically. Nothing in the current DT shall block any future work on the AW869A support though and the above "aliases" entry shall even guarantee unchanged serial enumeration shall such support arise. > > +®_aldo1 { >=20 > What is aldo1 used for, actually? I don't see this referenced anywhere.= =20 > I guess the kernel turns that off after booting? > If you have access to the schematic, please check that. If that's for=20 > some peripheral not yet supported, please note the user anyway, ideally= =20 > by an explaining regulator-name, or by a comment. Also if it's used for= =20 > any of the required SoC VDD pins. See the Liontron .dts for comparison. >=20 > > + regulator-always-on; ^^^^^^^^^^^^^^^^^^^ I suppose it's not being switcdhed of because of the above. It's used for both PLL supply for the whole SoC + as analog voltage referen= ce for LRADC (the buttons you've noticed on the board are connected to this ADC via a resistor ladder). >=20 > > +®_aldo2 { > > + regulator-always-on; >=20 > For always-on regulators we definitely need an explanation. Does the=20 > board stop booting if you remove this line? > Maybe it's for DRAM? Can you say what voltage it is, either from the=20 > reset default, or set by the bootloader? Thanks for the hint! I'll put proper voltages into all regulators + comment all the always-on regulators. >=20 > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a133-baijie-helper.dt= s b/arch/arm64/boot/dts/allwinner/sun50i-a133-baijie-helper.dts > > new file mode 100644 > > index 000000000000..ccbca5d0a40c > > --- /dev/null > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a133-baijie-helper.dts > And you should provide a top level 5V regulator here, to be the root of= =20 > the regulator tree. Look at reg_vcc5v in the Liontron .dts. It doesn't look to me as if Liontron had reg_vcc5v as its 5V "root" regulat= or. It seems to be only used for reg_usb1_vbus, while HelperBoard A133 doesn't have USB power control. The second issue with Helper/Core split is that all PMIC story is inside Core board which has 5V input rail, while HelperBo= ard around it has indeed 12V->5V DCDC regulator (similar to Liontron), but putting it in the DT would introduce wierd dependency of the core to the HelperBoard which carries it. Do you think it would make sense? > So from the pictures I found online it looks like there is an USB-C port= =20 > labelled "OTG", so can you please add an &usbotg reference here and=20 > describe that port. Nice catch! I've missed the fact usbphy 0 has to be in peripheral mode, not host mode. Will rework! > > +&usbphy { >=20 > Are the two USB ports always powered? >=20 > And anyway, I see a *dual* USB-A socket on the pictures online, in=20 > addition to the USB-OTG port. So where does the third USB come from? The= =20 > A133 only supports one host USB port plus the one OTG port. So is there= =20 > an USB hub chip on the board? There are two hubs, one on each usbphy. OTG side hub is even bus-powered, two USB-A ports are always powered from the board's 12V->5V DCDC, no USB load switches. >=20 --=20 Alexander Sverdlin.