[PATCH 0/5] arm64: Realtek RTD1295 reset controllers

[PATCH 0/5] arm64: Realtek RTD1295 reset controllers

[Andreas Färber]

Hello,

This series adds reset controllers for the Realtek RTD1295 SoC.

Since there is still no public source code for RTD1295, the individual resets
were derived from reset-names in the vendor DT; the implementation was a guess.

More experimental patches at:
https://github.com/afaerber/linux/commits/rtd1295-next

Have a lot of fun!

Cheers,
Andreas

Cc: Roc He <hepeng@zidoo.tv>
Cc: ??? <jiang.liqin@geniatech.com>
Cc: devicetree at vger.kernel.org

Andreas F?rber (5):
  dt-bindings: reset: Add Realtek RTD1295
  arm64: dts: realtek: Add RTD1295 reset controller nodes
  reset: Add Realtek RTD1295 driver
  arm64: dts: realtek: Add RTD1295 UART resets
  arm64: dts: realtek: Adopt RTD1295 reset constants

 .../bindings/reset/realtek,rtd129x-reset.txt       |  18 ++++
 arch/arm64/boot/dts/realtek/rtd1295.dtsi           |  34 +++++++
 drivers/reset/Kconfig                              |   6 ++
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-rtd129x.c                      | 100 ++++++++++++++++++
 include/dt-bindings/reset/realtek,rtd1295.h        | 112 +++++++++++++++++++++
 6 files changed, 271 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/realtek,rtd129x-reset.txt
 create mode 100644 drivers/reset/reset-rtd129x.c
 create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

-- 
2.12.3

[PATCH 1/5] dt-bindings: reset: Add Realtek RTD1295

[Andreas Färber]

Add binding for Realtek RTD1295 reset controller.

Signed-off-by: Andreas F?rber <afaerber@suse.de>
---
 .../bindings/reset/realtek,rtd129x-reset.txt       |  18 ++++
 include/dt-bindings/reset/realtek,rtd1295.h        | 112 +++++++++++++++++++++
 2 files changed, 130 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/realtek,rtd129x-reset.txt
 create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

diff --git a/Documentation/devicetree/bindings/reset/realtek,rtd129x-reset.txt b/Documentation/devicetree/bindings/reset/realtek,rtd129x-reset.txt
new file mode 100644
index 000000000000..79fb37feb0a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/realtek,rtd129x-reset.txt
@@ -0,0 +1,18 @@
+Realtek RTD129x Reset Controller
+================================
+
+Required properties:
+- compatible   :  Should be "realtek,rtd1295-reset"
+- reg          :  Should contain the register address and 4 as size.
+- #reset-cells :  Should be 1
+
+See reset.txt for common reset controller bindings.
+
+
+Example:
+
+	reset-controller at 98000000 {
+		compatible = "realtek,rtd1295-reset";
+		reg = <0x98000000 0x4>;
+		#reset-cells = <1>;
+	};
diff --git a/include/dt-bindings/reset/realtek,rtd1295.h b/include/dt-bindings/reset/realtek,rtd1295.h
new file mode 100644
index 000000000000..237b3ff6697e
--- /dev/null
+++ b/include/dt-bindings/reset/realtek,rtd1295.h
@@ -0,0 +1,112 @@
+/*
+ * Realtek RTD1295 reset controllers
+ *
+ * Copyright (c) 2017 Andreas F?rber
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+#ifndef DT_BINDINGS_RESET_RTD1295_H
+#define DT_BINDINGS_RESET_RTD1295_H
+
+/* soft reset 1 */
+#define RTD1295_RSTN_MISC		0
+#define RTD1295_RSTN_NAT		1
+#define RTD1295_RSTN_USB3_PHY0_POW	2
+#define RTD1295_RSTN_GSPI		3
+#define RTD1295_RSTN_USB3_P0_MDIO	4
+#define RTD1295_RSTN_SATA_0		5
+#define RTD1295_RSTN_USB		6
+#define RTD1295_RSTN_SATA_PHY_0		7
+#define RTD1295_RSTN_USB_PHY0		8
+#define RTD1295_RSTN_USB_PHY1		9
+#define RTD1295_RSTN_SATA_PHY_POW_0	10
+#define RTD1295_RSTN_SATA_FUNC_EXIST_0	11
+#define RTD1295_RSTN_HDMI		12
+#define RTD1295_RSTN_VE1		13
+#define RTD1295_RSTN_VE2		14
+#define RTD1295_RSTN_VE3		15
+#define RTD1295_RSTN_ETN		16
+#define RTD1295_RSTN_AIO		17
+#define RTD1295_RSTN_GPU		18
+#define RTD1295_RSTN_TVE		19
+#define RTD1295_RSTN_VO			20
+#define RTD1295_RSTN_LVDS		21
+#define RTD1295_RSTN_SE			22
+#define RTD1295_RSTN_DCU		23
+#define RTD1295_RSTN_DC_PHY		24
+#define RTD1295_RSTN_CP			25
+#define RTD1295_RSTN_MD			26
+#define RTD1295_RSTN_TP			27
+#define RTD1295_RSTN_AE			28
+#define RTD1295_RSTN_NF			29
+#define RTD1295_RSTN_MIPI		30
+#define RTD1295_RSTN_RSA		31
+
+/* soft reset 2 */
+#define RTD1295_RSTN_ACPU		0
+#define RTD1295_RSTN_JPEG		1
+#define RTD1295_RSTN_USB_PHY3		2
+#define RTD1295_RSTN_USB_PHY2		3
+#define RTD1295_RSTN_USB3_PHY1_POW	4
+#define RTD1295_RSTN_USB3_P1_MDIO	5
+#define RTD1295_RSTN_PCIE0_STITCH	6
+#define RTD1295_RSTN_PCIE0_PHY		7
+#define RTD1295_RSTN_PCIE0		8
+#define RTD1295_RSTN_PCR_CNT		9
+#define RTD1295_RSTN_CR			10
+#define RTD1295_RSTN_EMMC		11
+#define RTD1295_RSTN_SDIO		12
+#define RTD1295_RSTN_PCIE0_CORE		13
+#define RTD1295_RSTN_PCIE0_POWER	14
+#define RTD1295_RSTN_PCIE0_NONSTICH	15
+#define RTD1295_RSTN_PCIE1_PHY		16
+#define RTD1295_RSTN_PCIE1		17
+#define RTD1295_RSTN_I2C_5		18
+#define RTD1295_RSTN_PCIE1_STITCH	19
+#define RTD1295_RSTN_PCIE1_CORE		20
+#define RTD1295_RSTN_PCIE1_POWER	21
+#define RTD1295_RSTN_PCIE1_NONSTICH	22
+#define RTD1295_RSTN_I2C_4		23
+#define RTD1295_RSTN_I2C_3		24
+#define RTD1295_RSTN_I2C_2		25
+#define RTD1295_RSTN_I2C_1		26
+#define RTD1295_RSTN_UR2		27
+#define RTD1295_RSTN_UR1		28
+#define RTD1295_RSTN_MISC_SC		29
+#define RTD1295_RSTN_CBUS_TX		30
+#define RTD1295_RSTN_SDS_PHY		31
+
+/* soft reset 4 */
+#define RTD1295_RSTN_DCPHY_CRT		0
+#define RTD1295_RSTN_DCPHY_ALERT_RX	1
+#define RTD1295_RSTN_DCPHY_PTR		2
+#define RTD1295_RSTN_DCPHY_LDO		3
+#define RTD1295_RSTN_DCPHY_SSC_DIG	4
+#define RTD1295_RSTN_HDMIRX		5
+#define RTD1295_RSTN_CBUSRX		6
+#define RTD1295_RSTN_SATA_PHY_POW_1	7
+#define RTD1295_RSTN_SATA_FUNC_EXIST_1	8
+#define RTD1295_RSTN_SATA_PHY_1		9
+#define RTD1295_RSTN_SATA_1		10
+#define RTD1295_RSTN_FAN		11
+#define RTD1295_RSTN_HDMIRX_WRAP	12
+#define RTD1295_RSTN_PCIE0_PHY_MDIO	13
+#define RTD1295_RSTN_PCIE1_PHY_MDIO	14
+#define RTD1295_RSTN_DISP		15
+
+/* iso reset */
+#define RTD1295_ISO_RSTN_IR		1
+#define RTD1295_ISO_RSTN_CEC0		2
+#define RTD1295_ISO_RSTN_CEC1		3
+#define RTD1295_ISO_RSTN_DP		4
+#define RTD1295_ISO_RSTN_CBUSTX		5
+#define RTD1295_ISO_RSTN_CBUSRX		6
+#define RTD1295_ISO_RSTN_EFUSE		7
+#define RTD1295_ISO_RSTN_UR0		8
+#define RTD1295_ISO_RSTN_GMAC		9
+#define RTD1295_ISO_RSTN_GPHY		10
+#define RTD1295_ISO_RSTN_I2C_0		11
+#define RTD1295_ISO_RSTN_I2C_1		12
+#define RTD1295_ISO_RSTN_CBUS		13
+
+#endif
-- 
2.12.3

[PATCH 1/5] dt-bindings: reset: Add Realtek RTD1295

[Rob Herring]

On Wed, Aug 16, 2017 at 02:38:43AM +0200, Andreas F?rber wrote:
> Add binding for Realtek RTD1295 reset controller.
> 
> Signed-off-by: Andreas F?rber <afaerber@suse.de>
> ---
>  .../bindings/reset/realtek,rtd129x-reset.txt       |  18 ++++
>  include/dt-bindings/reset/realtek,rtd1295.h        | 112 +++++++++++++++++++++
>  2 files changed, 130 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/realtek,rtd129x-reset.txt
>  create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 2/5] arm64: dts: realtek: Add RTD1295 reset controller nodes

[Andreas Färber]

Add nodes for the Realtek RTD1295 reset controllers.

Signed-off-by: Andreas F?rber <afaerber@suse.de>
---
 arch/arm64/boot/dts/realtek/rtd1295.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
index 43da91fce2b1..9f1dcd1fa8b3 100644
--- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
@@ -87,6 +87,36 @@
 		/* Exclude up to 2 GiB of RAM */
 		ranges = <0x80000000 0x80000000 0x80000000>;
 
+		reset1: reset-controller at 98000000 {
+			compatible = "realtek,rtd1295-reset";
+			reg = <0x98000000 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset2: reset-controller at 98000004 {
+			compatible = "realtek,rtd1295-reset";
+			reg = <0x98000004 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset3: reset-controller at 98000008 {
+			compatible = "realtek,rtd1295-reset";
+			reg = <0x98000008 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset4: reset-controller at 98000050 {
+			compatible = "realtek,rtd1295-reset";
+			reg = <0x98000050 0x4>;
+			#reset-cells = <1>;
+		};
+
+		iso_reset: reset-controller at 98007088 {
+			compatible = "realtek,rtd1295-reset";
+			reg = <0x98007088 0x4>;
+			#reset-cells = <1>;
+		};
+
 		uart0: serial at 98007800 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x98007800 0x400>;
-- 
2.12.3

[PATCH 3/5] reset: Add Realtek RTD1295 driver

[Andreas Färber]

Add a per-register reset controller driver. This deals with the fact
that not all registers are adjoined.

Signed-off-by: Andreas F?rber <afaerber@suse.de>
---
 drivers/reset/Kconfig         |   6 +++
 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-rtd129x.c | 100 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 107 insertions(+)
 create mode 100644 drivers/reset/reset-rtd129x.c

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 52d5251660b9..dbac75e3f82c 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -68,6 +68,12 @@ config RESET_PISTACHIO
 	help
 	  This enables the reset driver for ImgTec Pistachio SoCs.
 
+config RESET_RTD129X
+	bool "Realtek RTD129x Reset Driver" if COMPILE_TEST
+	default ARCH_REALTEK if ARM64
+	help
+	  This enables the reset controller driver for Realtek RTD1295 SoC.
+
 config RESET_SOCFPGA
 	bool "SoCFPGA Reset Driver" if COMPILE_TEST
 	default ARCH_SOCFPGA
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index b62783f50fe5..bca900260a57 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
 obj-$(CONFIG_RESET_MESON) += reset-meson.o
 obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
 obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
+obj-$(CONFIG_RESET_RTD129X) += reset-rtd129x.o
 obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
 obj-$(CONFIG_RESET_STM32) += reset-stm32.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
diff --git a/drivers/reset/reset-rtd129x.c b/drivers/reset/reset-rtd129x.c
new file mode 100644
index 000000000000..d553900096c6
--- /dev/null
+++ b/drivers/reset/reset-rtd129x.c
@@ -0,0 +1,100 @@
+/*
+ * Realtek RTD129x reset controller
+ *
+ * Copyright (c) 2017 Andreas F?rber
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+struct rtd129x_reset_controller {
+	struct reset_controller_dev rcdev;
+	void __iomem *base;
+	spinlock_t lock;
+};
+
+#define to_rtd129x_rcdev(_rcdev) \
+	container_of(_rcdev, struct rtd129x_reset_controller, rcdev)
+
+static int rtd129x_reset_assert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	struct rtd129x_reset_controller *data = to_rtd129x_rcdev(rcdev);
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->base);
+	writel(reg & ~BIT(id), data->base);
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static int rtd129x_reset_deassert(struct reset_controller_dev *rcdev,
+				  unsigned long id)
+{
+	struct rtd129x_reset_controller *data = to_rtd129x_rcdev(rcdev);
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->base);
+	writel(reg | BIT(id), data->base);
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static const struct reset_control_ops rtd129x_reset_ops = {
+	.assert		= rtd129x_reset_assert,
+	.deassert	= rtd129x_reset_deassert,
+};
+
+static const struct of_device_id rtd129x_reset_dt_ids[] = {
+	 { .compatible = "realtek,rtd1295-reset" },
+	 { }
+};
+
+static int rtd129x_reset_probe(struct platform_device *pdev)
+{
+	struct rtd129x_reset_controller *data;
+	struct resource *res;
+
+	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	data->base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(data->base))
+		return PTR_ERR(data->base);
+
+	spin_lock_init(&data->lock);
+
+	data->rcdev.owner = THIS_MODULE;
+	data->rcdev.nr_resets = 32;
+	data->rcdev.ops = &rtd129x_reset_ops;
+	data->rcdev.of_node = pdev->dev.of_node;
+
+	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
+}
+
+static struct platform_driver rtd129x_reset_driver = {
+	.probe = rtd129x_reset_probe,
+	.driver = {
+		.name = "rtd129x-reset",
+		.of_match_table	= rtd129x_reset_dt_ids,
+	},
+};
+builtin_platform_driver(rtd129x_reset_driver);
-- 
2.12.3

[PATCH 3/5] reset: Add Realtek RTD1295 driver

[Philipp Zabel]

Hi Andreas,

On Wed, 2017-08-16 at 02:38 +0200, Andreas F?rber wrote:
> Add a per-register reset controller driver. This deals with the fact
> that not all registers are adjoined.

the way you handle the non-contiguous reset registers, this looks like
a candidate to join?the recently discussed reset-simple driver [1].
Could you check if that would fit?

regards
Philipp

[PATCH 3/5] reset: Add Realtek RTD1295 driver

[Andreas Färber]

Hi Philipp,

Am 16.08.2017 um 11:44 schrieb Philipp Zabel:
> On Wed, 2017-08-16 at 02:38 +0200, Andreas F?rber wrote:
>> Add a per-register reset controller driver. This deals with the fact
>> that not all registers are adjoined.
> 
> the way you handle the non-contiguous reset registers, this looks like
> a candidate to join the recently discussed reset-simple driver [1].
> Could you check if that would fit?

Thanks, I appreciate the idea, and it looks like you already have the
active-low logic in place.

Are you okay with keeping the first three as separate nodes, or would
you rather want one node to cover the first three registers, plus two
separate ones for the non-contiguous cases? Or is the simple driver
supposed to cover gaps, too? Then we could go with just two nodes. (I
found it weird to have reset and then reset4, so I went with separate
ones as seen downstream.)

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany
GF: Felix Imend?rffer, Jane Smithard, Graham Norton
HRB 21284 (AG N?rnberg)

[PATCH 3/5] reset: Add Realtek RTD1295 driver

[Philipp Zabel]

On Wed, 2017-08-16 at 14:09 +0200, Andreas F?rber wrote:
> Hi Philipp,
> 
> Am 16.08.2017 um 11:44 schrieb Philipp Zabel:
> > On Wed, 2017-08-16 at 02:38 +0200, Andreas F?rber wrote:
> > > Add a per-register reset controller driver. This deals with the
> > > fact
> > > that not all registers are adjoined.
> > 
> > the way you handle the non-contiguous reset registers, this looks
> > like
> > a candidate to join the recently discussed reset-simple driver [1].
> > Could you check if that would fit?
> 
> Thanks, I appreciate the idea, and it looks like you already have the
> active-low logic in place.
> 
> Are you okay with keeping the first three as separate nodes, or would
> you rather want one node to cover the first three registers, plus two
> separate ones for the non-contiguous cases?

I am fine with keeping them separate, if you think this best describes
the hardware.

> Or is the simple driver supposed to cover gaps, too? Then we could go
> with just two nodes. (I found it weird to have reset and then reset4,
> so I went with separate ones as seen downstream.)

I had declared gaps as out of scope of the simple reset controller
driver, but if the implementation could be kept reasonably simple, we
could think about supporting something like this, too:

		reset: reset-controller at 98000000 {
			compatible = "realtek,rtd1295-reset";
			reg = <0x98000000 0xc>, <0x98000050 0x4>;
			#reset-cells = <1>;
		};

regards
Philipp

[PATCH 4/5] arm64: dts: realtek: Add RTD1295 UART resets

[Andreas Färber]

Associate the UART nodes with the corresponding reset controller bits.

Signed-off-by: Andreas F?rber <afaerber@suse.de>
---
 arch/arm64/boot/dts/realtek/rtd1295.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
index 9f1dcd1fa8b3..e777200d84b9 100644
--- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
@@ -123,6 +123,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <27000000>;
+			resets = <&iso_reset 8>;
 			status = "disabled";
 		};
 
@@ -132,6 +133,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
+			resets = <&reset2 28>;
 			status = "disabled";
 		};
 
@@ -141,6 +143,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
+			resets = <&reset2 27>;
 			status = "disabled";
 		};
 
-- 
2.12.3

[PATCH 5/5] arm64: dts: realtek: Adopt RTD1295 reset constants

[Andreas Färber]

Replace reset controller indices with constants.

Signed-off-by: Andreas F?rber <afaerber@suse.de>
---
 arch/arm64/boot/dts/realtek/rtd1295.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
index e777200d84b9..2d2d84b573e3 100644
--- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
@@ -7,6 +7,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/realtek,rtd1295.h>
 
 / {
 	compatible = "realtek,rtd1295";
@@ -123,7 +124,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <27000000>;
-			resets = <&iso_reset 8>;
+			resets = <&iso_reset RTD1295_ISO_RSTN_UR0>;
 			status = "disabled";
 		};
 
@@ -133,7 +134,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
-			resets = <&reset2 28>;
+			resets = <&reset2 RTD1295_RSTN_UR1>;
 			status = "disabled";
 		};
 
@@ -143,7 +144,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
-			resets = <&reset2 27>;
+			resets = <&reset2 RTD1295_RSTN_UR2>;
 			status = "disabled";
 		};
 
-- 
2.12.3