* [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank
@ 2017-09-21 10:31 Chunfeng Yun
2017-09-21 10:31 ` [PATCH RESEND 2/2] phy: phy-mtk-tphy: add set_mode callback Chunfeng Yun
2017-09-21 10:53 ` [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank Kishon Vijay Abraham I
0 siblings, 2 replies; 4+ messages in thread
From: Chunfeng Yun @ 2017-09-21 10:31 UTC (permalink / raw)
To: linux-arm-kernel
Chip bank of version-1 is initialized as NULL, but it's used
by pcie_phy_instance_power_on/off(), so assign it a right
address.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index e3baad7..721a2a1 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -27,6 +27,7 @@
/* banks shared by multiple phys */
#define SSUSB_SIFSLV_V1_SPLLC 0x000 /* shared by u3 phys */
#define SSUSB_SIFSLV_V1_U2FREQ 0x100 /* shared by u2 phys */
+#define SSUSB_SIFSLV_V1_CHIP 0x300 /* shared by u3 phys */
/* u2 phy bank */
#define SSUSB_SIFSLV_V1_U2PHY_COM 0x000
/* u3/pcie/sata phy banks */
@@ -762,7 +763,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
case PHY_TYPE_USB3:
case PHY_TYPE_PCIE:
u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
- u3_banks->chip = NULL;
+ u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
break;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH RESEND 2/2] phy: phy-mtk-tphy: add set_mode callback
2017-09-21 10:31 [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank Chunfeng Yun
@ 2017-09-21 10:31 ` Chunfeng Yun
2017-09-21 10:53 ` [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank Kishon Vijay Abraham I
1 sibling, 0 replies; 4+ messages in thread
From: Chunfeng Yun @ 2017-09-21 10:31 UTC (permalink / raw)
To: linux-arm-kernel
This is used to force PHY with USB OTG function to enter a specific
mode, and override OTG IDPIN(or IDDIG) signal.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 39 +++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index 721a2a1..402385f 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -96,9 +96,11 @@
#define U3P_U2PHYDTM1 0x06C
#define P2C_RG_UART_EN BIT(16)
+#define P2C_FORCE_IDDIG BIT(9)
#define P2C_RG_VBUSVALID BIT(5)
#define P2C_RG_SESSEND BIT(4)
#define P2C_RG_AVALID BIT(2)
+#define P2C_RG_IDDIG BIT(1)
#define U3P_U3_CHIP_GPIO_CTLD 0x0c
#define P3C_REG_IP_SW_RST BIT(31)
@@ -585,6 +587,31 @@ static void u2_phy_instance_exit(struct mtk_tphy *tphy,
}
}
+static void u2_phy_instance_set_mode(struct mtk_tphy *tphy,
+ struct mtk_phy_instance *instance,
+ enum phy_mode mode)
+{
+ struct u2phy_banks *u2_banks = &instance->u2_banks;
+ u32 tmp;
+
+ tmp = readl(u2_banks->com + U3P_U2PHYDTM1);
+ switch (mode) {
+ case PHY_MODE_USB_DEVICE:
+ tmp |= P2C_FORCE_IDDIG | P2C_RG_IDDIG;
+ break;
+ case PHY_MODE_USB_HOST:
+ tmp |= P2C_FORCE_IDDIG;
+ tmp &= ~P2C_RG_IDDIG;
+ break;
+ case PHY_MODE_USB_OTG:
+ tmp &= ~(P2C_FORCE_IDDIG | P2C_RG_IDDIG);
+ break;
+ default:
+ return;
+ }
+ writel(tmp, u2_banks->com + U3P_U2PHYDTM1);
+}
+
static void pcie_phy_instance_init(struct mtk_tphy *tphy,
struct mtk_phy_instance *instance)
{
@@ -881,6 +908,17 @@ static int mtk_phy_exit(struct phy *phy)
return 0;
}
+static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode)
+{
+ struct mtk_phy_instance *instance = phy_get_drvdata(phy);
+ struct mtk_tphy *tphy = dev_get_drvdata(phy->dev.parent);
+
+ if (instance->type == PHY_TYPE_USB2)
+ u2_phy_instance_set_mode(tphy, instance, mode);
+
+ return 0;
+}
+
static struct phy *mtk_phy_xlate(struct device *dev,
struct of_phandle_args *args)
{
@@ -931,6 +969,7 @@ static struct phy *mtk_phy_xlate(struct device *dev,
.exit = mtk_phy_exit,
.power_on = mtk_phy_power_on,
.power_off = mtk_phy_power_off,
+ .set_mode = mtk_phy_set_mode,
.owner = THIS_MODULE,
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank
2017-09-21 10:31 [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank Chunfeng Yun
2017-09-21 10:31 ` [PATCH RESEND 2/2] phy: phy-mtk-tphy: add set_mode callback Chunfeng Yun
@ 2017-09-21 10:53 ` Kishon Vijay Abraham I
2017-09-22 1:14 ` Chunfeng Yun
1 sibling, 1 reply; 4+ messages in thread
From: Kishon Vijay Abraham I @ 2017-09-21 10:53 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 21 September 2017 04:01 PM, Chunfeng Yun wrote:
> Chip bank of version-1 is initialized as NULL, but it's used
> by pcie_phy_instance_power_on/off(), so assign it a right
> address.
merged. How was this not noticed before?
Thanks
Kishon
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> drivers/phy/mediatek/phy-mtk-tphy.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
> index e3baad7..721a2a1 100644
> --- a/drivers/phy/mediatek/phy-mtk-tphy.c
> +++ b/drivers/phy/mediatek/phy-mtk-tphy.c
> @@ -27,6 +27,7 @@
> /* banks shared by multiple phys */
> #define SSUSB_SIFSLV_V1_SPLLC 0x000 /* shared by u3 phys */
> #define SSUSB_SIFSLV_V1_U2FREQ 0x100 /* shared by u2 phys */
> +#define SSUSB_SIFSLV_V1_CHIP 0x300 /* shared by u3 phys */
> /* u2 phy bank */
> #define SSUSB_SIFSLV_V1_U2PHY_COM 0x000
> /* u3/pcie/sata phy banks */
> @@ -762,7 +763,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
> case PHY_TYPE_USB3:
> case PHY_TYPE_PCIE:
> u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
> - u3_banks->chip = NULL;
> + u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
> u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
> u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
> break;
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank
2017-09-21 10:53 ` [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank Kishon Vijay Abraham I
@ 2017-09-22 1:14 ` Chunfeng Yun
0 siblings, 0 replies; 4+ messages in thread
From: Chunfeng Yun @ 2017-09-22 1:14 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2017-09-21 at 16:23 +0530, Kishon Vijay Abraham I wrote:
>
> On Thursday 21 September 2017 04:01 PM, Chunfeng Yun wrote:
> > Chip bank of version-1 is initialized as NULL, but it's used
> > by pcie_phy_instance_power_on/off(), so assign it a right
> > address.
>
> merged. How was this not noticed before?
The PCIe function was tested on mt2712 with tphy-v2, and didn't notice
this issue until tested it on mt7622 with tphy-v1.
Ashamed of myself for making such a rookie mistake.
>
> Thanks
> Kishon
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > drivers/phy/mediatek/phy-mtk-tphy.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
> > index e3baad7..721a2a1 100644
> > --- a/drivers/phy/mediatek/phy-mtk-tphy.c
> > +++ b/drivers/phy/mediatek/phy-mtk-tphy.c
> > @@ -27,6 +27,7 @@
> > /* banks shared by multiple phys */
> > #define SSUSB_SIFSLV_V1_SPLLC 0x000 /* shared by u3 phys */
> > #define SSUSB_SIFSLV_V1_U2FREQ 0x100 /* shared by u2 phys */
> > +#define SSUSB_SIFSLV_V1_CHIP 0x300 /* shared by u3 phys */
> > /* u2 phy bank */
> > #define SSUSB_SIFSLV_V1_U2PHY_COM 0x000
> > /* u3/pcie/sata phy banks */
> > @@ -762,7 +763,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
> > case PHY_TYPE_USB3:
> > case PHY_TYPE_PCIE:
> > u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
> > - u3_banks->chip = NULL;
> > + u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
> > u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
> > u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
> > break;
> >
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-09-22 1:14 UTC | newest]
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2017-09-21 10:31 [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank Chunfeng Yun
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2017-09-21 10:53 ` [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank Kishon Vijay Abraham I
2017-09-22 1:14 ` Chunfeng Yun
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