From: cdall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 16/20] KVM: arm/arm64: Use kvm_arm_timer_set/get_reg for guest register traps
Date: Fri, 27 Oct 2017 10:34:37 +0200 [thread overview]
Message-ID: <1509093281-15225-17-git-send-email-cdall@linaro.org> (raw)
In-Reply-To: <1509093281-15225-1-git-send-email-cdall@linaro.org>
When trapping on a guest access to one of the timer registers, we were
messing with the internals of the timer state from the sysregs handling
code, and that logic was about to receive more added complexity when
optimizing the timer handling code.
Therefore, since we already have timer register access functions (to
access registers from userspace), reuse those for the timer register
traps from a VM and let the timer code maintain its own consistency.
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/kvm/sys_regs.c | 41 ++++++++++++++---------------------------
1 file changed, 14 insertions(+), 27 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 2e070d3..bb0e41b 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -841,13 +841,16 @@ static bool access_cntp_tval(struct kvm_vcpu *vcpu,
struct sys_reg_params *p,
const struct sys_reg_desc *r)
{
- struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
u64 now = kvm_phys_timer_read();
+ u64 cval;
- if (p->is_write)
- ptimer->cnt_cval = p->regval + now;
- else
- p->regval = ptimer->cnt_cval - now;
+ if (p->is_write) {
+ kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL,
+ p->regval + now);
+ } else {
+ cval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL);
+ p->regval = cval - now;
+ }
return true;
}
@@ -856,24 +859,10 @@ static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
struct sys_reg_params *p,
const struct sys_reg_desc *r)
{
- struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
-
- if (p->is_write) {
- /* ISTATUS bit is read-only */
- ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
- } else {
- u64 now = kvm_phys_timer_read();
-
- p->regval = ptimer->cnt_ctl;
- /*
- * Set ISTATUS bit if it's expired.
- * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
- * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
- * regardless of ENABLE bit for our implementation convenience.
- */
- if (ptimer->cnt_cval <= now)
- p->regval |= ARCH_TIMER_CTRL_IT_STAT;
- }
+ if (p->is_write)
+ kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CTL, p->regval);
+ else
+ p->regval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CTL);
return true;
}
@@ -882,12 +871,10 @@ static bool access_cntp_cval(struct kvm_vcpu *vcpu,
struct sys_reg_params *p,
const struct sys_reg_desc *r)
{
- struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
-
if (p->is_write)
- ptimer->cnt_cval = p->regval;
+ kvm_arm_timer_set_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL, p->regval);
else
- p->regval = ptimer->cnt_cval;
+ p->regval = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_PTIMER_CVAL);
return true;
}
--
2.7.4
next prev parent reply other threads:[~2017-10-27 8:34 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-27 8:34 [PATCH v5 00/20] KVM: arm/arm64: Optimize arch timer register handling Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 01/20] irqchip/gic: Deal with broken firmware exposing only 4kB of GICv2 CPU interface Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 02/20] arm64: Implement arch_counter_get_cntpct to read the physical counter Christoffer Dall
2017-10-27 10:53 ` Catalin Marinas
2017-10-29 1:51 ` Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 03/20] arm64: Use physical counter for in-kernel reads when booted in EL2 Christoffer Dall
2017-10-27 10:53 ` Catalin Marinas
2017-10-27 8:34 ` [PATCH v5 04/20] KVM: arm/arm64: Guard kvm_vgic_map_is_active against !vgic_initialized Christoffer Dall
2017-11-16 12:29 ` Andre Przywara
2017-11-20 11:20 ` Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 05/20] KVM: arm/arm64: Support calling vgic_update_irq_pending from irq context Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 06/20] KVM: arm/arm64: Check that system supports split eoi/deactivate Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 07/20] KVM: arm/arm64: Make timer_arm and timer_disarm helpers more generic Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 08/20] KVM: arm/arm64: Rename soft timer to bg_timer Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 09/20] KVM: arm/arm64: Move timer/vgic flush/sync under disabled irq Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 10/20] KVM: arm/arm64: Use separate timer for phys timer emulation Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 11/20] KVM: arm/arm64: Move timer save/restore out of the hyp code Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 12/20] genirq: Document vcpu_info usage for percpu_devid interrupts Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 13/20] KVM: arm/arm64: Set VCPU affinity for virt timer irq Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 14/20] KVM: arm/arm64: Avoid timer save/restore in vcpu entry/exit Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 15/20] KVM: arm/arm64: Support EL1 phys timer register access in set/get reg Christoffer Dall
2017-10-27 8:34 ` Christoffer Dall [this message]
2017-10-27 8:34 ` [PATCH v5 17/20] KVM: arm/arm64: Move phys_timer_emulate function Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 18/20] KVM: arm/arm64: Avoid phys timer emulation in vcpu entry/exit Christoffer Dall
2017-10-27 8:34 ` [PATCH v5 19/20] KVM: arm/arm64: Get rid of kvm_timer_flush_hwstate Christoffer Dall
2017-11-27 16:50 ` Andrew Jones
2017-11-29 17:39 ` Christoffer Dall
2017-11-29 18:17 ` Andrew Jones
2017-10-27 8:34 ` [PATCH v5 20/20] KVM: arm/arm64: Rework kvm_timer_should_fire Christoffer Dall
2017-10-29 1:48 ` [PATCH v5 21/20] arm/arm64: KVM: Load the timer state when enabling the timer Christoffer Dall
2017-10-29 2:07 ` Marc Zyngier
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